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[v2,0/4] target/i386: Emulate ftz and denormal flag bits correctly

Message ID 20250519145114.2786534-1-peter.maydell@linaro.org
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Series target/i386: Emulate ftz and denormal flag bits correctly | expand

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Peter Maydell May 19, 2025, 2:51 p.m. UTC 
This is a set of four patches to target/i386 which use the core
fpu functionality we just landed for Arm FEAT_AFP to correct
the emulation of some corner cases of x86 floating point:
 * when we are flushing denormal outputs to zero, this should
   be done after rounding, not before
 * the MXCSR.DE and FPUS.DE bits indicate when a denormal input
   was not flushed and was used in an fp operation; we previously
   weren't implementing these semantics

All four patches have been reviewed.  Testing is a bit light (make
check-tcg and make check-functional), because AFAIK there is no
freely available comprehensive FP testsuite for x86, and risu doesn't
support x86 currently so I can't do the same kind of
random-instruction-testing I could for Arm.

Changes v1->v2: just a rebase to apply on current head of git.

thanks
-- PMM

Peter Maydell (4):
  target/i386: Detect flush-to-zero after rounding
  target/i386: Use correct type for get_float_exception_flags() values
  target/i386: Wire up MXCSR.DE and FPUS.DE correctly
  tests/tcg/x86_64/fma: add test for exact-denormal output

 target/i386/ops_sse.h        |  16 +++---
 target/i386/tcg/fpu_helper.c | 101 +++++++++++++++++------------------
 tests/tcg/x86_64/fma.c       |  17 ++++--
 3 files changed, 68 insertions(+), 66 deletions(-)