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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a073ca5219sm13729371f8f.27.2025.04.29.06.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Apr 2025 06:22:01 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Edgar E . Iglesias" Subject: [PATCH v2 0/7] target/arm: Remove TYPE_AARCH64_CPU class Date: Tue, 29 Apr 2025 14:21:53 +0100 Message-ID: <20250429132200.605611-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently we have a class hierarchy for Arm CPUs where all the 32-bit CPUs (including M-profile) inherit directly from TYPE_ARM_CPU, but the 64-bit CPUs inherit from TYPE_AARCH64_CPU, which is a subclass of TYPE_ARM_CPU. This subclass does essentially two things: * it sets up fields and methods for the gdbstub so that the gdbstub presents an AArch64 CPU to gdb rather than an AArch32 one * it defines the 'aarch64' CPU property which you can use with KVM to disable AArch64 and create a 32-bit VM (with "-cpu host,aarch64=off") This is a bit weird, because the 32-bit CPU you create with KVM and aarch64=off is still a subclass of TYPE_AARCH64_CPU. It also still presents gdb with an AArch64 CPU, so you effectively can't use the gdbstub with this kind of VM. This patchseries removes TYPE_AARCH64_CPU so that all CPUs, both AArch32 and AArch64, directly inherit from TYPE_ARM_CPU. This lets us fix the bug with gdbstub and "aarch64=off". In this version I fix the bug that Philippe found where we were calling arm_gdbstub_is_aarch64() too early, before the object had been created and the "is it AArch64 or not?" question resolved. This is basically moving the gdb_init_cpu() call into cpu_exec_realizefn(), but we need to do a little adjustment of microblaze for that to work. Version 2 of the patchset: * patches 1-5 from v1 are already upstream * new patches 1-3 here delay the call to gdb_init_cpu() so that it is done only after the CPU object is at least inited and we definitely know the final value of the 'aarch64' property * patches 4-7 are the old 6-9 and have been reviewed thanks -- PMM Peter Maydell (7): target/microblaze: Use 'obj' in DEVICE() casts in mb_cpu_initfn() target/microblaze: Delay gdb_register_coprocessor() to realize hw/core/cpu-common: Don't init gdbstub until cpu_exec_realizefn() target/arm: Present AArch64 gdbstub based on ARM_FEATURE_AARCH64 target/arm: Move aarch64 CPU property code to TYPE_ARM_CPU target/arm/kvm: don't check TYPE_AARCH64_CPU target/arm: Remove TYPE_AARCH64_CPU target/arm/cpu-qom.h | 5 --- target/arm/cpu.h | 4 -- target/arm/internals.h | 3 +- hw/core/cpu-common.c | 3 +- target/arm/cpu.c | 36 ++++++++++++++++++ target/arm/cpu64.c | 82 +---------------------------------------- target/arm/kvm.c | 3 +- target/arm/tcg/cpu64.c | 2 +- target/microblaze/cpu.c | 22 +++++------ 9 files changed, 52 insertions(+), 108 deletions(-)