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[PATCH-for-10.1,v2,00/43] tcg: philmd's queue

Message ID 20250402212319.58349-1-philmd@linaro.org
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Series tcg: philmd's queue | expand

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Philippe Mathieu-Daudé April 2, 2025, 9:23 p.m. UTC 
Hi Richard,

Here is my patch queue based on your tcg-next tree.

Missing review: 38, 41, 43 (all news)

Thanks,

Phil.

Since v1:
- Deferred warning change and updated desc (patches 40 & 42)

(skipping patches 1-37 because identical of v1:
https://lore.kernel.org/qemu-devel/20250402210328.52897-1-philmd@linaro.org/)

Philippe Mathieu-Daudé (43):
  tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h'
  tcg: Always define TARGET_INSN_START_EXTRA_WORDS
  hw/core/cpu: Update CPUClass::mmu_index docstring
  accel/tcg: Introduce TCGCPUOps::mmu_index() callback
  target/alpha: Restrict SoftMMU mmu_index() to TCG
  target/arm: Restrict SoftMMU mmu_index() to TCG
  target/avr: Restrict SoftMMU mmu_index() to TCG
  target/hppa: Restrict SoftMMU mmu_index() to TCG
  target/i386: Remove unused cpu_(ldub,stb)_kernel macros
  target/i386: Restrict cpu_mmu_index_kernel() to TCG
  target/i386: Restrict SoftMMU mmu_index() to TCG
  target/loongarch: Restrict SoftMMU mmu_index() to TCG
  target/m68k: Restrict SoftMMU mmu_index() to TCG
  target/microblaze: Restrict SoftMMU mmu_index() to TCG
  target/mips: Restrict SoftMMU mmu_index() to TCG
  target/openrisc: Restrict SoftMMU mmu_index() to TCG
  target/ppc: Restrict SoftMMU mmu_index() to TCG
  target/riscv: Restrict SoftMMU mmu_index() to TCG
  target/rx: Fix copy/paste typo (riscv -> rx)
  target/rx: Restrict SoftMMU mmu_index() to TCG
  target/s390x: Restrict SoftMMU mmu_index() to TCG
  target/sh4: Restrict SoftMMU mmu_index() to TCG
  target/sparc: Restrict SoftMMU mmu_index() to TCG
  target/tricore: Restrict SoftMMU mmu_index() to TCG
  target/xtensa: Restrict SoftMMU mmu_index() to TCG
  hw/core/cpu: Remove CPUClass::mmu_index()
  exec: Restrict cpu-mmu-index.h to accel/tcg/
  exec: Restrict 'cpu-ldst-common.h' to accel/tcg/
  exec: Restrict 'cpu_ldst.h' to accel/tcg/
  exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h'
  tcg: Always define TCG_GUEST_DEFAULT_MO
  tcg: Simplify tcg_req_mo() macro
  tcg: Define guest_default_memory_order in TCGCPUOps
  tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code()
  tcg: Propagate CPUState argument to cpu_req_mo()
  tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order
  tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally
  tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'
  tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h'
  tcg: Convert TCGState::mttcg_enabled to TriState
  tcg: Factor mttcg_init() out
  tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field
  target/arm: Update comment around cpu_untagged_addr()

 docs/devel/multi-thread-tcg.rst               |  6 +-
 configs/targets/aarch64-softmmu.mak           |  1 -
 configs/targets/alpha-softmmu.mak             |  1 -
 configs/targets/arm-softmmu.mak               |  1 -
 configs/targets/hppa-softmmu.mak              |  1 -
 configs/targets/i386-softmmu.mak              |  1 -
 configs/targets/loongarch64-softmmu.mak       |  1 -
 configs/targets/microblaze-softmmu.mak        |  1 -
 configs/targets/microblazeel-softmmu.mak      |  1 -
 configs/targets/mips-softmmu.mak              |  1 -
 configs/targets/mipsel-softmmu.mak            |  1 -
 configs/targets/or1k-softmmu.mak              |  1 -
 configs/targets/ppc64-softmmu.mak             |  1 -
 configs/targets/riscv32-softmmu.mak           |  1 -
 configs/targets/riscv64-softmmu.mak           |  1 -
 configs/targets/s390x-softmmu.mak             |  1 -
 configs/targets/sparc-softmmu.mak             |  1 -
 configs/targets/sparc64-softmmu.mak           |  1 -
 configs/targets/x86_64-softmmu.mak            |  1 -
 configs/targets/xtensa-softmmu.mak            |  1 -
 configs/targets/xtensaeb-softmmu.mak          |  1 -
 accel/tcg/backend-ldst.h                      | 41 +++++++++
 accel/tcg/internal-common.h                   | 27 ++++++
 accel/tcg/internal-target.h                   | 35 --------
 bsd-user/qemu.h                               |  2 +-
 include/{exec => accel/tcg}/cpu-ldst-common.h |  6 +-
 .../{exec/cpu_ldst.h => accel/tcg/cpu-ldst.h} | 10 +--
 include/{exec => accel/tcg}/cpu-mmu-index.h   |  9 +-
 include/accel/tcg/cpu-ops.h                   | 19 +++++
 include/exec/exec-all.h                       |  3 -
 include/exec/poison.h                         |  1 -
 include/hw/core/cpu.h                         | 12 ---
 include/system/tcg.h                          |  8 ++
 include/tcg/insn-start-words.h                |  4 -
 include/tcg/tcg-op.h                          |  2 +-
 linux-user/qemu.h                             |  2 +-
 target/alpha/cpu-param.h                      |  3 +-
 target/arm/cpu-param.h                        |  8 +-
 target/arm/cpu.h                              |  8 +-
 target/arm/internals.h                        |  1 +
 target/arm/tcg/sve_ldst_internal.h            |  2 +-
 target/avr/cpu-param.h                        |  2 +-
 target/hexagon/cpu-param.h                    |  2 +
 target/hppa/cpu-param.h                       |  8 +-
 target/hppa/cpu.h                             |  2 -
 target/i386/cpu-param.h                       |  3 +-
 target/i386/cpu.h                             |  5 --
 target/i386/tcg/seg_helper.h                  | 10 +--
 target/i386/tcg/tcg-cpu.h                     |  2 +
 target/loongarch/cpu-param.h                  |  2 +-
 target/m68k/cpu-param.h                       |  2 +
 target/m68k/cpu.h                             |  2 -
 target/microblaze/cpu-param.h                 |  3 +-
 target/microblaze/cpu.h                       |  2 -
 target/mips/cpu-param.h                       |  2 +-
 target/mips/cpu.h                             |  2 -
 target/openrisc/cpu-param.h                   |  2 +-
 target/openrisc/cpu.h                         |  2 -
 target/ppc/cpu-param.h                        |  2 +-
 target/riscv/cpu-param.h                      | 10 ++-
 target/riscv/cpu.h                            |  6 --
 target/rx/cpu-param.h                         |  2 +
 target/s390x/cpu-param.h                      |  6 +-
 target/s390x/cpu.h                            |  2 -
 target/sh4/cpu-param.h                        |  2 +
 target/sh4/cpu.h                              |  2 -
 target/sparc/cpu-param.h                      | 23 +----
 target/sparc/cpu.h                            |  1 -
 target/tricore/cpu-param.h                    |  2 +
 target/xtensa/cpu-param.h                     |  3 +-
 accel/tcg/cpu-exec.c                          |  2 +
 accel/tcg/cputlb.c                            | 23 ++---
 accel/tcg/tcg-all.c                           | 84 +++++++++++--------
 accel/tcg/translate-all.c                     |  6 +-
 accel/tcg/translator.c                        |  4 +-
 accel/tcg/user-exec.c                         | 23 ++---
 semihosting/uaccess.c                         |  2 +-
 target/alpha/cpu.c                            |  6 +-
 target/alpha/mem_helper.c                     |  2 +-
 target/arm/cpu.c                              | 17 ++--
 target/arm/gdbstub64.c                        |  2 +-
 target/arm/tcg/cpu-v7m.c                      |  5 ++
 target/arm/tcg/helper-a64.c                   |  2 +-
 target/arm/tcg/m_helper.c                     |  2 +-
 target/arm/tcg/mte_helper.c                   |  2 +-
 target/arm/tcg/mve_helper.c                   |  2 +-
 target/arm/tcg/op_helper.c                    |  2 +-
 target/arm/tcg/pauth_helper.c                 |  2 +-
 target/arm/tcg/sme_helper.c                   |  2 +-
 target/arm/tcg/sve_helper.c                   |  1 +
 target/avr/cpu.c                              |  4 +-
 target/avr/helper.c                           |  2 +-
 target/hexagon/cpu.c                          |  3 +
 target/hexagon/op_helper.c                    |  2 +-
 target/hexagon/translate.c                    |  2 +-
 target/hppa/cpu.c                             | 11 ++-
 target/hppa/mem_helper.c                      |  2 +-
 target/hppa/op_helper.c                       |  2 +-
 target/i386/cpu.c                             | 34 --------
 target/i386/tcg/access.c                      |  2 +-
 target/i386/tcg/fpu_helper.c                  |  2 +-
 target/i386/tcg/mem_helper.c                  |  2 +-
 target/i386/tcg/mpx_helper.c                  |  2 +-
 target/i386/tcg/seg_helper.c                  | 19 ++++-
 target/i386/tcg/system/excp_helper.c          |  2 +-
 target/i386/tcg/system/misc_helper.c          |  2 +-
 target/i386/tcg/system/seg_helper.c           |  2 +-
 target/i386/tcg/system/svm_helper.c           |  2 +-
 target/i386/tcg/tcg-cpu.c                     | 23 +++++
 target/i386/tcg/translate.c                   |  2 +-
 target/i386/tcg/user/seg_helper.c             |  2 +-
 target/loongarch/cpu.c                        |  7 +-
 target/loongarch/cpu_helper.c                 |  2 +-
 target/loongarch/tcg/csr_helper.c             |  2 +-
 target/loongarch/tcg/fpu_helper.c             |  2 +-
 target/loongarch/tcg/iocsr_helper.c           |  2 +-
 target/loongarch/tcg/op_helper.c              |  2 +-
 target/loongarch/tcg/tlb_helper.c             |  2 +-
 target/m68k/cpu.c                             |  6 +-
 target/m68k/fpu_helper.c                      |  2 +-
 target/m68k/op_helper.c                       |  2 +-
 target/microblaze/cpu.c                       |  8 +-
 target/microblaze/helper.c                    |  2 +-
 target/microblaze/mmu.c                       |  2 +-
 target/microblaze/op_helper.c                 |  2 +-
 target/microblaze/translate.c                 |  2 +-
 target/mips/cpu.c                             |  5 +-
 target/mips/tcg/ldst_helper.c                 |  2 +-
 target/mips/tcg/msa_helper.c                  |  2 +-
 target/mips/tcg/system/tlb_helper.c           |  2 +-
 target/openrisc/cpu.c                         |  5 +-
 target/openrisc/translate.c                   |  2 +-
 target/ppc/cpu_init.c                         |  5 +-
 target/ppc/mem_helper.c                       |  2 +-
 target/ppc/mmu_helper.c                       |  2 +-
 target/ppc/tcg-excp_helper.c                  |  2 +-
 target/riscv/cpu.c                            |  6 --
 target/riscv/op_helper.c                      |  2 +-
 target/riscv/tcg/tcg-cpu.c                    | 10 +++
 target/riscv/vector_helper.c                  |  2 +-
 target/riscv/zce_helper.c                     |  2 +-
 target/rx/cpu.c                               |  8 +-
 target/rx/helper.c                            |  2 +-
 target/rx/op_helper.c                         |  2 +-
 target/s390x/cpu.c                            |  9 +-
 target/s390x/tcg/crypto_helper.c              |  2 +-
 target/s390x/tcg/int_helper.c                 |  2 +-
 target/s390x/tcg/mem_helper.c                 |  2 +-
 target/s390x/tcg/misc_helper.c                |  2 +-
 target/s390x/tcg/vec_helper.c                 |  2 +-
 target/sh4/cpu.c                              |  6 +-
 target/sh4/op_helper.c                        |  2 +-
 target/sparc/cpu.c                            | 28 ++++++-
 target/sparc/int32_helper.c                   |  2 +-
 target/sparc/ldst_helper.c                    |  2 +-
 target/sparc/mmu_helper.c                     |  2 +-
 target/tricore/cpu.c                          |  5 +-
 target/tricore/helper.c                       |  2 +-
 target/tricore/op_helper.c                    |  2 +-
 target/tricore/translate.c                    |  2 +-
 target/xtensa/cpu.c                           |  6 +-
 target/xtensa/mmu_helper.c                    |  2 +-
 tcg/region.c                                  |  4 +-
 163 files changed, 472 insertions(+), 378 deletions(-)
 create mode 100644 accel/tcg/backend-ldst.h
 rename include/{exec => accel/tcg}/cpu-ldst-common.h (97%)
 rename include/{exec/cpu_ldst.h => accel/tcg/cpu-ldst.h} (99%)
 rename include/{exec => accel/tcg}/cpu-mmu-index.h (78%)