| Message ID | 20250401080938.32278-1-philmd@linaro.org |
|---|---|
| Headers | show |
| Series | cpus: Restrict SoftMMU mmu_index() to TCG | expand |
On 4/1/25 03:09, Philippe Mathieu-Daudé wrote: > mmu_index() is specific to TCG SoftMMU, > moveCPUClass::mmu_index() toTCGCPUOps::mmu_index(). > > Philippe Mathieu-Daudé (24): > hw/core/cpu: UpdateCPUClass::mmu_index docstring > accel/tcg: IntroduceTCGCPUOps::mmu_index() callback > target/alpha: Restrict SoftMMU mmu_index() to TCG > target/arm: Restrict SoftMMU mmu_index() to TCG > target/avr: Restrict SoftMMU mmu_index() to TCG > target/hppa: Restrict SoftMMU mmu_index() to TCG > target/i386: Remove unused cpu_(ldub,stb)_kernel macros > target/i386: Restrict cpu_mmu_index_kernel() to TCG > target/i386: Restrict SoftMMU mmu_index() to TCG > target/loongarch: Restrict SoftMMU mmu_index() to TCG > target/m68k: Restrict SoftMMU mmu_index() to TCG > target/microblaze: Restrict SoftMMU mmu_index() to TCG > target/mips: Restrict SoftMMU mmu_index() to TCG > target/openrisc: Restrict SoftMMU mmu_index() to TCG > target/ppc: Restrict SoftMMU mmu_index() to TCG > target/riscv: Restrict SoftMMU mmu_index() to TCG > target/rx: Restrict SoftMMU mmu_index() to TCG > target/s390x: Restrict SoftMMU mmu_index() to TCG > target/sh4: Restrict SoftMMU mmu_index() to TCG > target/sparc: Restrict SoftMMU mmu_index() to TCG > target/tricore: Restrict SoftMMU mmu_index() to TCG > target/xtensa: Restrict SoftMMU mmu_index() to TCG > hw/core/cpu: RemoveCPUClass::mmu_index() > exec: Restrict cpu-mmu-index.h to accel/tcg/ Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 4/1/25 01:09, Philippe Mathieu-Daudé wrote: > mmu_index() is specific to TCG SoftMMU, > moveCPUClass::mmu_index() toTCGCPUOps::mmu_index(). > > Philippe Mathieu-Daudé (24): > hw/core/cpu: UpdateCPUClass::mmu_index docstring > accel/tcg: IntroduceTCGCPUOps::mmu_index() callback > target/alpha: Restrict SoftMMU mmu_index() to TCG > target/arm: Restrict SoftMMU mmu_index() to TCG > target/avr: Restrict SoftMMU mmu_index() to TCG > target/hppa: Restrict SoftMMU mmu_index() to TCG > target/i386: Remove unused cpu_(ldub,stb)_kernel macros > target/i386: Restrict cpu_mmu_index_kernel() to TCG > target/i386: Restrict SoftMMU mmu_index() to TCG > target/loongarch: Restrict SoftMMU mmu_index() to TCG > target/m68k: Restrict SoftMMU mmu_index() to TCG > target/microblaze: Restrict SoftMMU mmu_index() to TCG > target/mips: Restrict SoftMMU mmu_index() to TCG > target/openrisc: Restrict SoftMMU mmu_index() to TCG > target/ppc: Restrict SoftMMU mmu_index() to TCG > target/riscv: Restrict SoftMMU mmu_index() to TCG > target/rx: Restrict SoftMMU mmu_index() to TCG > target/s390x: Restrict SoftMMU mmu_index() to TCG > target/sh4: Restrict SoftMMU mmu_index() to TCG > target/sparc: Restrict SoftMMU mmu_index() to TCG > target/tricore: Restrict SoftMMU mmu_index() to TCG > target/xtensa: Restrict SoftMMU mmu_index() to TCG > hw/core/cpu: RemoveCPUClass::mmu_index() > exec: Restrict cpu-mmu-index.h to accel/tcg/ Queued to tcg-next, including the addition of the assert. r~
mmu_index() is specific to TCG SoftMMU, move CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Philippe Mathieu-Daudé (24): hw/core/cpu: Update CPUClass::mmu_index docstring accel/tcg: Introduce TCGCPUOps::mmu_index() callback target/alpha: Restrict SoftMMU mmu_index() to TCG target/arm: Restrict SoftMMU mmu_index() to TCG target/avr: Restrict SoftMMU mmu_index() to TCG target/hppa: Restrict SoftMMU mmu_index() to TCG target/i386: Remove unused cpu_(ldub,stb)_kernel macros target/i386: Restrict cpu_mmu_index_kernel() to TCG target/i386: Restrict SoftMMU mmu_index() to TCG target/loongarch: Restrict SoftMMU mmu_index() to TCG target/m68k: Restrict SoftMMU mmu_index() to TCG target/microblaze: Restrict SoftMMU mmu_index() to TCG target/mips: Restrict SoftMMU mmu_index() to TCG target/openrisc: Restrict SoftMMU mmu_index() to TCG target/ppc: Restrict SoftMMU mmu_index() to TCG target/riscv: Restrict SoftMMU mmu_index() to TCG target/rx: Restrict SoftMMU mmu_index() to TCG target/s390x: Restrict SoftMMU mmu_index() to TCG target/sh4: Restrict SoftMMU mmu_index() to TCG target/sparc: Restrict SoftMMU mmu_index() to TCG target/tricore: Restrict SoftMMU mmu_index() to TCG target/xtensa: Restrict SoftMMU mmu_index() to TCG hw/core/cpu: Remove CPUClass::mmu_index() exec: Restrict cpu-mmu-index.h to accel/tcg/ include/{exec => accel/tcg}/cpu-mmu-index.h | 9 +++--- include/accel/tcg/cpu-ops.h | 3 ++ include/exec/cpu_ldst.h | 2 +- include/hw/core/cpu.h | 3 -- target/i386/cpu.h | 3 -- target/i386/tcg/seg_helper.h | 10 +++--- target/i386/tcg/tcg-cpu.h | 2 ++ accel/tcg/translator.c | 2 +- semihosting/uaccess.c | 2 +- target/alpha/cpu.c | 2 +- target/arm/cpu.c | 13 ++++---- target/arm/gdbstub64.c | 2 +- target/avr/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/hppa/mem_helper.c | 2 +- target/i386/cpu.c | 34 --------------------- target/i386/tcg/seg_helper.c | 17 +++++++++++ target/i386/tcg/tcg-cpu.c | 18 +++++++++++ target/i386/tcg/translate.c | 2 +- target/loongarch/cpu.c | 2 +- target/loongarch/cpu_helper.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/microblaze/helper.c | 2 +- target/microblaze/mmu.c | 2 +- target/mips/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/openrisc/translate.c | 2 +- target/ppc/cpu_init.c | 2 +- target/riscv/cpu.c | 6 ---- target/riscv/tcg/tcg-cpu.c | 6 ++++ target/rx/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 4 +-- target/sparc/mmu_helper.c | 2 +- target/tricore/cpu.c | 2 +- target/tricore/helper.c | 2 +- target/xtensa/cpu.c | 2 +- target/xtensa/mmu_helper.c | 2 +- 40 files changed, 91 insertions(+), 91 deletions(-) rename include/{exec => accel/tcg}/cpu-mmu-index.h (78%)