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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9955fbsm13940057f8f.5.2025.03.25.08.40.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 08:40:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Pierrick Bouvier , Zhao Liu , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Yanan Wang , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson Subject: [PATCH-for-10.1 0/8] target/mips: Make 'cpu-qom.h' target agnostic Date: Tue, 25 Mar 2025 16:40:50 +0100 Message-ID: <20250325154058.92735-1-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org - Remove the TARGET_MIPS64 use in 'cpu-qom.h' to make it target agnostic - Introduce mips_cpu_is_64bit() as a runtime check for compile time TARGET_MIPS64 definition - Replace the ldtul_p() gdbstub call by ldn_p() - Rename few symbols to avoid future linkage clash Philippe Mathieu-Daudé (8): cpus: Open code OBJECT_DECLARE_TYPE() in OBJECT_DECLARE_CPU_TYPE() target/mips: Declare CPU QOM types using DEFINE_TYPES() macro target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types target/mips: Prefix MMU API with 'mips_' target/mips: Replace ldtul_p() -> ldn_p(sizeof(target_ulong)) target/mips: Introduce mips_cpu_is_64bit() helper target/mips: Get CPU register size using mips_cpu_is_64bit() target/mips: Introduce mips_env_64bit_enabled() helper include/hw/core/cpu.h | 7 ++++- target/mips/cpu-qom.h | 14 +++++----- target/mips/internal.h | 5 ++++ target/mips/tcg/tcg-internal.h | 2 +- target/mips/cpu.c | 42 ++++++++++++++++++++--------- target/mips/gdbstub.c | 14 +++++++--- target/mips/tcg/system/tlb_helper.c | 2 +- 7 files changed, 61 insertions(+), 25 deletions(-) Reviewed-by: Anton Johansson