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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e5b10478sm13671714f8f.73.2024.12.04.12.26.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 00/20] target: Implement CPUClass::datapath_is_big_endian() handlers Date: Wed, 4 Dec 2024 21:25:42 +0100 Message-ID: <20241204202602.58083-1-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The long term goal is to remove endianness knowledge from QEMU system binaries, allowing them to run vCPU in any endianness. For that target_words_bigendian(), TARGET_BIG_ENDIAN and few other things (like MO_TE) must be removed. Have each target implement a datapath_is_big_endian() handler to express whether the CPU data is expected to be accessed in big endian or not. Few targets already provide a such functionality (ARM, PPC); for some the data endianness is exposed via a CPU bit; and for many the data endianness is fixed. Use this handler in 3 places: disas/, the generic-loader device and the VirtIO core layer. Note, a similar CPUClass::codepath_is_big_endian() helper could be useful for translator_ld/st_swap() API. Philippe Mathieu-Daudé (20): exec/tswap: Rename target_words_bigendian -> qemu_binary_is_bigendian hw/core/cpu: Introduce CPUClass::datapath_is_big_endian() handler target/arm: Implement CPUClass::datapath_is_big_endian target/ppc: Register CPUClass::datapath_is_big_endian target/rx: Implement CPUClass::datapath_is_big_endian target/sparc: Implement CPUClass::datapath_is_big_endian target/riscv: Implement CPUClass::datapath_is_big_endian target/sh4: Expose CPUSH4State::little_endian property target/sh4: Implement CPUClass::datapath_is_big_endian target/microblaze: Implement CPUClass::datapath_is_big_endian target/mips: Implement CPUClass::datapath_is_big_endian target/xtensa: Implement xtensa_isa_is_big_endian() target/xtensa: Implement CPUClass::datapath_is_big_endian target: Implement CPUClass::datapath_is_big_endian (little-endian) target: Implement CPUClass::datapath_is_big_endian (big-endian) hw/core/cpu: Expose cpu_datapath_is_big_endian() method disas: Use cpu_datapath_is_big_endian() hw/core/generic-loader: Use cpu_datapath_is_big_endian() hw/virtio: Use cpu_datapath_is_big_endian() hw/core/cpu: Remove cpu_virtio_is_big_endian() include/exec/tswap.h | 18 +++++++++--------- include/hw/core/cpu.h | 22 ++++++++++++---------- include/hw/core/sysemu-cpu-ops.h | 8 -------- include/hw/xtensa/xtensa-isa.h | 1 + target/microblaze/cpu.h | 2 ++ target/sh4/cpu.h | 6 ++++++ cpu-target.c | 2 +- disas/disas-common.c | 3 +-- hw/core/cpu-common.c | 7 +++++++ hw/core/cpu-sysemu.c | 11 ----------- hw/core/generic-loader.c | 7 ++----- hw/display/vga.c | 4 ++-- hw/virtio/virtio.c | 4 ++-- system/qtest.c | 2 +- target/alpha/cpu.c | 6 ++++++ target/arm/cpu.c | 4 ++-- target/avr/cpu.c | 7 ++++++- target/hexagon/cpu.c | 6 ++++++ target/hppa/cpu.c | 6 ++++++ target/i386/cpu.c | 6 ++++++ target/loongarch/cpu.c | 6 ++++++ target/m68k/cpu.c | 6 ++++++ target/microblaze/cpu.c | 11 +++++++++++ target/mips/cpu.c | 9 +++++++++ target/openrisc/cpu.c | 6 ++++++ target/ppc/cpu_init.c | 8 ++++---- target/riscv/cpu.c | 17 +++++++++++++++++ target/rx/cpu.c | 10 ++++++++++ target/s390x/cpu.c | 6 ++++++ target/sh4/cpu.c | 16 ++++++++++++++++ target/sparc/cpu.c | 15 +++++++++++++++ target/tricore/cpu.c | 6 ++++++ target/xtensa/cpu.c | 8 ++++++++ target/xtensa/xtensa-isa.c | 7 +++++++ 34 files changed, 205 insertions(+), 58 deletions(-)