mbox series

[PATCH-for-10.0,0/3] hw/char/riscv_htif: Remove tswap64() calls

Message ID 20241129154304.34946-1-philmd@linaro.org
Headers show
Series hw/char/riscv_htif: Remove tswap64() calls | expand

Message

Philippe Mathieu-Daudé Nov. 29, 2024, 3:43 p.m. UTC 
Trying to make sense of these tswap64 calls I
figured this device could be simplified.

Tested using 'make check-{qtest,functional}'
on both big/little endian hosts, no failure but
I'm not sure the code path is covered.

Philippe Mathieu-Daudé (3):
  MAINTAINERS: Cover RISC-V HTIF interface
  hw/char/riscv_htif: Explicit little-endian implementation
  hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses

 MAINTAINERS          |  2 ++
 hw/char/riscv_htif.c | 15 ++++++++++-----
 2 files changed, 12 insertions(+), 5 deletions(-)

Comments

Alistair Francis Dec. 3, 2024, 6:35 a.m. UTC | #1 
On Sat, Nov 30, 2024 at 12:44 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Trying to make sense of these tswap64 calls I
> figured this device could be simplified.
>
> Tested using 'make check-{qtest,functional}'
> on both big/little endian hosts, no failure but
> I'm not sure the code path is covered.
>
> Philippe Mathieu-Daudé (3):
>   MAINTAINERS: Cover RISC-V HTIF interface
>   hw/char/riscv_htif: Explicit little-endian implementation
>   hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  MAINTAINERS          |  2 ++
>  hw/char/riscv_htif.c | 15 ++++++++++-----
>  2 files changed, 12 insertions(+), 5 deletions(-)
>
> --
> 2.45.2
>
>