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[176.184.14.96]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fad6270sm16073937f8f.14.2024.11.27.04.17.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 27 Nov 2024 04:17:00 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 0/6] accel/tcg: Allow tcg_exec_realizefn() initialize multiple frontends Date: Wed, 27 Nov 2024 13:16:52 +0100 Message-ID: <20241127121658.88966-1-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Little step toward heterogeneous emulation. After few trivial cleanups, allow accel_cpu_common_realize() -> tcg_exec_realizefn() to call frontend TCGCPUOps::initialize() for different targets. Philippe Mathieu-Daudé (6): target/ppc: Indent ppc_tcg_ops[] with 4 spaces accel/tcg: Declare local tcg_ops variable in tcg_exec_realizefn() accel/tcg: Rename TCGCPUOps::initialize() as initialize_once() include: Expose QemuArch in 'qemu/arch_id.h' accel/tcg: Add TCGCPUOps::arch_id field accel/tcg: Allow tcg_exec_realizefn() initialize multiple frontends include/hw/core/tcg-cpu-ops.h | 9 ++++++--- include/qemu/arch_id.h | 28 ++++++++++++++++++++++++++++ include/sysemu/arch_init.h | 28 +++------------------------- accel/tcg/cpu-exec.c | 13 +++++++------ target/alpha/cpu.c | 3 ++- target/arm/cpu.c | 3 ++- target/arm/tcg/cpu-v7m.c | 3 ++- target/avr/cpu.c | 3 ++- target/hexagon/cpu.c | 3 ++- target/hppa/cpu.c | 3 ++- target/i386/tcg/tcg-cpu.c | 3 ++- target/loongarch/cpu.c | 3 ++- target/m68k/cpu.c | 3 ++- target/microblaze/cpu.c | 3 ++- target/mips/cpu.c | 3 ++- target/openrisc/cpu.c | 3 ++- target/ppc/cpu_init.c | 30 +++++++++++++++--------------- target/riscv/tcg/tcg-cpu.c | 3 ++- target/rx/cpu.c | 3 ++- target/s390x/cpu.c | 3 ++- target/sh4/cpu.c | 3 ++- target/sparc/cpu.c | 3 ++- target/tricore/cpu.c | 3 ++- target/xtensa/cpu.c | 3 ++- 24 files changed, 97 insertions(+), 68 deletions(-) create mode 100644 include/qemu/arch_id.h