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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id m15-20020a05600c460f00b0041a964b55ddsm1397134wmo.1.2024.04.26.05.29.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 05:29:14 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Radoslaw Biernacki , Leif Lindholm , Marcin Juszkiewicz Subject: [PATCH v2 0/4] target/arm: Make the counter frequency default 1GHz for new CPUs, machines Date: Fri, 26 Apr 2024 13:29:09 +0100 Message-Id: <20240426122913.3427983-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=peter.maydell@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In previous versions of the Arm architecture, the frequency of the generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value, and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns. In Armv8.6, the architecture standardized this frequency to 1GHz. Because there is no ID register feature field that indicates whether a CPU is v8.6 or that it ought to have this counter frequency, we implement this by changing our default CNTFRQ value for all CPUs, with exceptions for backwards compatibility: * CPU types which we already implement will retain the old default value. None of these are v8.6 CPUs, so this is architecturally OK. * CPUs used in versioned machine types with a version of 9.0 or earlier will retain the old default value. The upshot is that the only CPU type that changes is 'max'; but any new type we add in future (whether v8.6 or not) will also get the new 1GHz default (assuming we spot in code review any attempts to set the ARM_FEATURE_BACKCOMPAT_CNTFRQ flag on new CPU types as a result of cut-n-paste from an older CPU initfn ;-)). It remains the case that the machine model can override the default value via the 'cntfrq' QOM property (regardless of the CPU type). Unfortunately the TF-A firmware used to hard-code the CPU frequency, resulting in guest timers not running for the right duration. This is fixed in TF-A git but not yet in a release, and affects users running TF-A on either virt or sbsa-ref. For virt I think running TF-A is not a common setup, and besides we have versioned board models so users can use virt-9.0 if they want to run older TF-A binaries. For sbsa-ref the machine isn't versioned and TF-A is part of the standard guest software stack, so I've opted in this patchset to have our board model retain the old 62.5MHz clock for now. We can update that once e.g. TF-A has made a release with the fix (and we've updated our Avocado test's binaries!). I plan to leave it up to the sbsa-ref maintainers to decide when they're happy to make that change. Patches 1 and 4 are from v1 and have been reviewed. Patches 2 and 3 are new and together keep sbsa-ref on the old 62.5MHz value, at least for now. thanks -- PMM Peter Maydell (4): target/arm: Refactor default generic timer frequency handling hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property target/arm: Default to 1GHz cntfrq for 'max' and new CPUs include/hw/watchdog/sbsa_gwdt.h | 3 +-- target/arm/cpu.h | 11 +++++++++ target/arm/internals.h | 15 +++++++++--- hw/arm/sbsa-ref.c | 16 +++++++++++++ hw/core/machine.c | 4 +++- hw/watchdog/sbsa_gwdt.c | 15 +++++++++++- target/arm/cpu.c | 42 ++++++++++++++++++++++----------- target/arm/cpu64.c | 2 ++ target/arm/helper.c | 16 ++++++------- target/arm/tcg/cpu32.c | 4 ++++ target/arm/tcg/cpu64.c | 18 ++++++++++++++ 11 files changed, 117 insertions(+), 29 deletions(-)