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[for-9.0,0/3] target/hppa: Fix DCOR, UADDCM conditions

Message ID 20240325030448.52110-1-richard.henderson@linaro.org
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Series target/hppa: Fix DCOR, UADDCM conditions | expand

Message

Richard Henderson March 25, 2024, 3:04 a.m. UTC 
Two problems, both related to the reconstruction and computation
of carry bits.  Simplify UXOR a bit, since no carry is involved.
While in the area, optimize UADDCM without condition, as that's
the common case for inverting a register.


r~


Richard Henderson (3):
  targt/hppa: Fix DCOR reconstruction of carry bits
  target/hppa: Optimize UADDCM with no condition
  target/hppa: Fix unit carry conditions

 target/hppa/translate.c | 240 ++++++++++++++++++++++------------------
 1 file changed, 132 insertions(+), 108 deletions(-)