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[00/14] hw/southbridge: Extract ICH9 QOM container model

Message ID 20240219163855.87326-1-philmd@linaro.org
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Series hw/southbridge: Extract ICH9 QOM container model | expand

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Philippe Mathieu-Daudé Feb. 19, 2024, 4:38 p.m. UTC 
Hi,

I have a long standing southbridge QOM rework branches. Since
Bernhard is actively working on the PIIX, I'll try to refresh
and post. This is also motivated by the Dynamic Machine work
where we are trying to figure the ideal DSL for QEMU, so having
complex models well designed help.

Here we introduce the ICH9 'southbridge' as a QOM container.
Since the chipset comes as a whole, we shouldn't instantiate
its components separately. However in order to maintain old
code we expose some properties to configure the container and
not introduce any change for the Q35 machine. There is no
migration change, only QOM objects moved around.

More work remain in the LPC function (more code to remove from
Q35). Maybe worth doing in parallel with the PIIX to clean both
PC machines.

Also we'd need to decouple the cpu_interrupt() calls between hw/
and target/.

Note that GSI is currently broken [1]. Once the LPC/ISA part is
done, it might be easier to fix it.

Based-on: <20240213043859.61019-1-philmd@linaro.org> [2]
Based-on: <20240219141412.71418-1-philmd@linaro.org> [3]

[1] https://lore.kernel.org/qemu-devel/cd0e13c6-c03d-411f-83a5-1d4d28ea4345@linaro.org/
[2] https://lore.kernel.org/qemu-devel/20240213043859.61019-1-philmd@linaro.org/ (USB)
[3] https://lore.kernel.org/qemu-devel/20240219141412.71418-1-philmd@linaro.org/ (AHCI)

Philippe Mathieu-Daudé (14):
  MAINTAINERS: Add 'ICH9 South Bridge' section
  hw/i386/q35: Add local 'lpc_obj' variable
  hw/acpi/ich9: Restrict definitions from 'hw/southbridge/ich9.h'
  hw/acpi/ich9_tco: Include 'ich9' in names
  hw/acpi/ich9_tco: Restrict ich9_generate_smi() declaration
  hw/pci-bridge: Extract QOM ICH definitions to 'ich_dmi_pci.h'
  hw/southbridge/ich9: Introduce TYPE_ICH9_SOUTHBRIDGE stub
  hw/southbridge/ich9: Add the DMI-to-PCI bridge
  hw/southbridge/ich9: Add a AHCI function
  hw/i2c/smbus: Extract QOM ICH9 definitions to 'smbus_ich9.h'
  hw/southbridge/ich9: Add the SMBus function
  hw/southbridge/ich9: Add the USB EHCI/UHCI functions
  hw/southbridge/ich9: Extract LPC definitions to 'hw/isa/ich9_lpc.h'
  hw/southbridge/ich9: Add the LPC / ISA bridge function

 MAINTAINERS                         |  21 ++-
 include/hw/acpi/ich9.h              |  15 ++
 include/hw/acpi/ich9_tco.h          |   6 +-
 include/hw/i2c/smbus_ich9.h         |  25 +++
 include/hw/isa/ich9_lpc.h           | 166 ++++++++++++++++++++
 include/hw/pci-bridge/ich_dmi_pci.h |  20 +++
 include/hw/southbridge/ich9.h       | 235 +---------------------------
 hw/acpi/ich9.c                      |   9 +-
 hw/acpi/ich9_tco.c                  |   5 +-
 hw/i2c/smbus_ich9.c                 |  36 +++--
 hw/i386/acpi-build.c                |   1 +
 hw/i386/pc_q35.c                    | 124 +++------------
 hw/isa/lpc_ich9.c                   |  37 ++++-
 hw/pci-bridge/i82801b11.c           |  11 +-
 hw/southbridge/ich9.c               | 212 +++++++++++++++++++++++++
 tests/qtest/tco-test.c              |   2 +-
 hw/Kconfig                          |   1 +
 hw/i386/Kconfig                     |   3 +-
 hw/meson.build                      |   1 +
 hw/southbridge/Kconfig              |  11 ++
 hw/southbridge/meson.build          |   3 +
 21 files changed, 581 insertions(+), 363 deletions(-)
 create mode 100644 include/hw/i2c/smbus_ich9.h
 create mode 100644 include/hw/isa/ich9_lpc.h
 create mode 100644 include/hw/pci-bridge/ich_dmi_pci.h
 create mode 100644 hw/southbridge/ich9.c
 create mode 100644 hw/southbridge/Kconfig
 create mode 100644 hw/southbridge/meson.build