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[00/33] tcg patch queue, pre-pull

Message ID 20240128044213.316480-1-richard.henderson@linaro.org
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Series tcg patch queue, pre-pull | expand

Message

Richard Henderson Jan. 28, 2024, 4:41 a.m. UTC 
Collect some patch sets, cherry-pick from others, with a few
changes of my own.  Patches that lack review:

  26-include-qemu-Add-TCGCPUOps-typedef-to-typedefs.h.patch
  27-target-loongarch-Constify-loongarch_tcg_ops.patch
  28-accel-tcg-Use-CPUState.cc-instead-of-CPU_GET_CLASS-i.patch
  31-accel-tcg-Inline-need_replay_interrupt.patch


r~


Anton Johansson (11):
  include/exec: Move vaddr defines to separate file
  hw/core: Include vaddr.h from cpu.h
  target: Use vaddr in gen_intermediate_code
  include/exec: Use vaddr in DisasContextBase for virtual addresses
  include/exec: typedef abi_ptr to vaddr
  target: Uninline cpu_mmu_index()
  target: Uninline cpu_get_tb_cpu_state()
  include/exec: Move PAGE_* macros to common header
  include/exec: Move cpu_*()/cpu_env() to common header
  include/hw/core: Move do_interrupt in TCGCPUOps
  include/hw/core: Remove i386 conditional on fake_user_interrupt

Ilya Leoshkevich (8):
  linux-user: Allow gdbstub to ignore page protection
  tests/tcg: Factor out gdbstub test functions
  tests/tcg: Add the PROT_NONE gdbstub test
  target: Make qemu_target_page_mask() available for *-user
  accel/tcg: Make use of qemu_target_page_mask() in perf.c
  tcg: Make tb_cflags() usable from target-agnostic code
  accel/tcg: Remove #ifdef TARGET_I386 from perf.c
  accel/tcg: Move perf and debuginfo support to tcg/

Paolo Bonzini (1):
  cpu-exec: simplify jump cache management

Philippe Mathieu-Daudé (9):
  accel/tcg/cpu-exec: Use RCU_READ_LOCK_GUARD
  accel/tcg: Rename tcg_ss[] -> tcg_specific_ss[] in meson
  accel/tcg: Rename tcg_cpus_destroy() -> tcg_cpu_destroy()
  accel/tcg: Rename tcg_cpus_exec() -> tcg_cpu_exec()
  accel/tcg: Un-inline icount_exit_request() for clarity
  accel/tcg: Introduce TCGCPUOps::need_replay_interrupt() handler
  target/i386: Extract x86_need_replay_interrupt() from accel/tcg/
  accel/tcg: Introduce TCGCPUOps::cpu_exec_halt() handler
  target/i386: Extract x86_cpu_exec_halt() from accel/tcg/

Richard Henderson (4):
  include/qemu: Add TCGCPUOps typedef to typedefs.h
  target/loongarch: Constify loongarch_tcg_ops
  accel/tcg: Use CPUState.cc instead of CPU_GET_CLASS in cpu-exec.c
  accel/tcg: Inline need_replay_interrupt

 accel/tcg/tb-jmp-cache.h                      |   8 +-
 accel/tcg/tcg-accel-ops.h                     |   4 +-
 include/exec/cpu-all.h                        |  49 ----
 include/exec/cpu-common.h                     |  82 ++++++-
 include/exec/cpu_ldst.h                       |   4 +-
 include/exec/exec-all.h                       |   6 -
 include/exec/translation-block.h              |   6 +
 include/exec/translator.h                     |   8 +-
 include/exec/vaddr.h                          |  18 ++
 include/hw/core/cpu.h                         |   7 +-
 include/hw/core/tcg-cpu-ops.h                 |  19 +-
 include/qemu/typedefs.h                       |   1 +
 {accel => include}/tcg/debuginfo.h            |   4 +-
 {accel => include}/tcg/perf.h                 |   4 +-
 target/alpha/cpu.h                            |  20 --
 target/arm/cpu.h                              |  16 --
 target/avr/cpu.h                              |  25 --
 target/cris/cpu.h                             |  14 --
 target/hexagon/cpu.h                          |  21 --
 target/hppa/cpu.h                             |  55 -----
 target/i386/cpu.h                             |  21 --
 target/i386/tcg/helper-tcg.h                  |   2 +
 target/loongarch/cpu.h                        |  24 --
 target/m68k/cpu.h                             |  20 --
 target/microblaze/cpu.h                       |  23 --
 target/mips/cpu.h                             |  14 --
 target/mips/tcg/translate.h                   |   3 +-
 target/nios2/cpu.h                            |  18 --
 target/openrisc/cpu.h                         |  22 --
 target/ppc/cpu.h                              |  21 --
 target/riscv/cpu.h                            |   6 -
 target/rx/cpu.h                               |  14 --
 target/s390x/cpu.h                            |  55 -----
 target/sh4/cpu.h                              |  25 --
 target/sparc/cpu.h                            |  61 -----
 target/tricore/cpu.h                          |  17 --
 target/xtensa/cpu.h                           |  73 ------
 accel/tcg/cpu-exec.c                          | 223 ++++++++----------
 accel/tcg/tcg-accel-ops-mttcg.c               |   4 +-
 accel/tcg/tcg-accel-ops-rr.c                  |   4 +-
 accel/tcg/tcg-accel-ops.c                     |   4 +-
 accel/tcg/translate-all.c                     |   2 +-
 bsd-user/signal.c                             |   4 +-
 cpu-target.c                                  |  76 ++++--
 hw/core/loader.c                              |   2 +-
 linux-user/elfload.c                          |   2 +-
 linux-user/exit.c                             |   2 +-
 linux-user/main.c                             |   2 +-
 linux-user/signal.c                           |   4 +-
 system/physmem.c                              |   5 -
 system/vl.c                                   |   2 +-
 target/alpha/cpu.c                            |  21 +-
 target/alpha/translate.c                      |   2 +-
 target/arm/cpu.c                              |   7 +-
 target/arm/tcg/cpu32.c                        |   2 +-
 target/arm/tcg/translate.c                    |   2 +-
 target/avr/cpu.c                              |  25 +-
 target/avr/translate.c                        |   2 +-
 target/cris/cpu.c                             |  18 +-
 target/cris/translate.c                       |   2 +-
 target/hexagon/cpu.c                          |  23 +-
 target/hexagon/translate.c                    |   5 +-
 target/hppa/cpu.c                             |  57 ++++-
 target/hppa/translate.c                       |   2 +-
 target/i386/cpu.c                             |  21 ++
 target/i386/tcg/sysemu/seg_helper.c           |  23 ++
 target/i386/tcg/tcg-cpu.c                     |   4 +-
 target/i386/tcg/translate.c                   |   2 +-
 target/loongarch/cpu.c                        |  26 +-
 target/loongarch/tcg/translate.c              |   2 +-
 target/m68k/cpu.c                             |  23 +-
 target/m68k/translate.c                       |   4 +-
 target/microblaze/cpu.c                       |  25 +-
 target/microblaze/translate.c                 |   2 +-
 target/mips/cpu.c                             |  16 +-
 target/mips/tcg/translate.c                   |  14 +-
 target/nios2/cpu.c                            |  20 +-
 target/nios2/translate.c                      |   2 +-
 target/openrisc/cpu.c                         |  24 +-
 target/openrisc/translate.c                   |   2 +-
 target/ppc/cpu.c                              |   9 +
 target/ppc/cpu_init.c                         |   2 +-
 target/ppc/helper_regs.c                      |  17 +-
 target/ppc/translate.c                        |   2 +-
 target/riscv/cpu_helper.c                     |   2 +-
 target/riscv/tcg/tcg-cpu.c                    |   2 +-
 target/riscv/translate.c                      |   2 +-
 target/rx/cpu.c                               |  16 +-
 target/rx/translate.c                         |   2 +-
 target/s390x/cpu.c                            |  55 ++++-
 target/s390x/tcg/translate.c                  |   2 +-
 target/sh4/cpu.c                              |  30 ++-
 target/sh4/translate.c                        |   2 +-
 target/sparc/cpu.c                            |  63 ++++-
 target/sparc/translate.c                      |   2 +-
 target/target-common.c                        |  10 +
 target/tricore/cpu.c                          |  19 +-
 target/tricore/translate.c                    |   2 +-
 target/xtensa/cpu.c                           |  74 +++++-
 target/xtensa/translate.c                     |   2 +-
 {accel/tcg => tcg}/debuginfo.c                |   3 +-
 {accel/tcg => tcg}/perf.c                     |  14 +-
 tcg/tcg.c                                     |   2 +-
 tests/tcg/multiarch/prot-none.c               |  40 ++++
 accel/tcg/meson.build                         |  16 +-
 target/meson.build                            |   2 +
 tcg/meson.build                               |   5 +
 tests/guest-debug/run-test.py                 |   7 +-
 tests/guest-debug/test_gdbstub.py             |  56 +++++
 tests/tcg/aarch64/gdbstub/test-sve-ioctl.py   |  34 +--
 tests/tcg/aarch64/gdbstub/test-sve.py         |  33 +--
 tests/tcg/multiarch/Makefile.target           |   9 +-
 tests/tcg/multiarch/gdbstub/interrupt.py      |  47 +---
 tests/tcg/multiarch/gdbstub/memory.py         |  39 +--
 tests/tcg/multiarch/gdbstub/prot-none.py      |  22 ++
 tests/tcg/multiarch/gdbstub/registers.py      |  41 +---
 tests/tcg/multiarch/gdbstub/sha1.py           |  38 +--
 .../multiarch/gdbstub/test-proc-mappings.py   |  39 +--
 .../multiarch/gdbstub/test-qxfer-auxv-read.py |  37 +--
 .../gdbstub/test-thread-breakpoint.py         |  37 +--
 tests/tcg/s390x/gdbstub/test-signals-s390x.py |  42 +---
 tests/tcg/s390x/gdbstub/test-svc.py           |  39 +--
 122 files changed, 1117 insertions(+), 1304 deletions(-)
 create mode 100644 include/exec/vaddr.h
 rename {accel => include}/tcg/debuginfo.h (96%)
 rename {accel => include}/tcg/perf.h (95%)
 create mode 100644 target/target-common.c
 rename {accel/tcg => tcg}/debuginfo.c (98%)
 rename {accel/tcg => tcg}/perf.c (97%)
 create mode 100644 tests/tcg/multiarch/prot-none.c
 create mode 100644 tests/guest-debug/test_gdbstub.py
 create mode 100644 tests/tcg/multiarch/gdbstub/prot-none.py

Comments

Richard Henderson Jan. 28, 2024, 6:30 a.m. UTC | #1 
On 1/28/24 14:41, Richard Henderson wrote:
>    target: Uninline cpu_mmu_index()
>    target: Uninline cpu_get_tb_cpu_state()

Dropping these two for now.  The cpu_get_tb_cpu_state patch fails s390x --disable-tcg. 
Both changes will be re-worked to introduce TCGCPUOps hooks immediately.


r~
Philippe Mathieu-Daudé Jan. 28, 2024, 4:30 p.m. UTC | #2 
On 28/1/24 05:41, Richard Henderson wrote:
> Collect some patch sets, cherry-pick from others, with a few
> changes of my own.  Patches that lack review:
> 
>    26-include-qemu-Add-TCGCPUOps-typedef-to-typedefs.h.patch
>    27-target-loongarch-Constify-loongarch_tcg_ops.patch
>    28-accel-tcg-Use-CPUState.cc-instead-of-CPU_GET_CLASS-i.patch
>    31-accel-tcg-Inline-need_replay_interrupt.patch
> 
> 
> r~
> 
> 
> Anton Johansson (11):
>    include/exec: Move vaddr defines to separate file
>    hw/core: Include vaddr.h from cpu.h
>    target: Use vaddr in gen_intermediate_code
>    include/exec: Use vaddr in DisasContextBase for virtual addresses
>    include/exec: typedef abi_ptr to vaddr
>    target: Uninline cpu_mmu_index()
>    target: Uninline cpu_get_tb_cpu_state()
>    include/exec: Move PAGE_* macros to common header
>    include/exec: Move cpu_*()/cpu_env() to common header
>    include/hw/core: Move do_interrupt in TCGCPUOps
>    include/hw/core: Remove i386 conditional on fake_user_interrupt

Nitpick: preferably s/^include\// in subject :)
Philippe Mathieu-Daudé Jan. 29, 2024, 6:36 p.m. UTC | #3 
On 28/1/24 07:30, Richard Henderson wrote:
> On 1/28/24 14:41, Richard Henderson wrote:
>>    target: Uninline cpu_mmu_index()
>>    target: Uninline cpu_get_tb_cpu_state()
> 
> Dropping these two for now.

Good news! (for me at least)