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[209.51.188.17]) by mx.google.com with ESMTPS id k17-20020a05620a415100b0076eeed38118si1974781qko.131.2023.12.08.03.36.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 08 Dec 2023 03:36:32 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ugonQN7T; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBZ9B-00041i-Dz; Fri, 08 Dec 2023 06:35:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBZ97-0003wr-2T for qemu-devel@nongnu.org; Fri, 08 Dec 2023 06:35:54 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBZ8o-0003NX-UM for qemu-devel@nongnu.org; Fri, 08 Dec 2023 06:35:51 -0500 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-332c46d5988so2074734f8f.1 for ; Fri, 08 Dec 2023 03:35:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702035332; x=1702640132; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=0bGgQr6byLDy4jY9fxc2ABAiH5gCgejb87jGCILL1Kk=; b=ugonQN7TvEdtddE34ujJPoiukY1xjft7seRajcC9W4ccT8ljOqcKDvGV1hIEup+iWV jQnAcHPVYmAHtzkP8A7gtKCbkOU+Mo12v3yLKNr3FlEq0/tTBssKIVKpvtN1f/RU6Nao J6l3dEkHaHo9mqEs09FkDe+ENRtIwmyxoRh/D5PKXrGI1yaa0BivlurGPEkzpXZXo3nl xca5L/WKrdPsbivYH9OmqjWfFz275eHnQXW5zY230hJ9jNT/sAymh3XlVdYfykvivZqF 1D5/KBQk5y2Obq3LLwsK8kgSDuMRS6kCDkaBuCDofe8Y/+n+g3TRog3ehrkG7GsO8kVh IZbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702035332; x=1702640132; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=0bGgQr6byLDy4jY9fxc2ABAiH5gCgejb87jGCILL1Kk=; b=fAhdPkneAOy6xYgbb5RfiUnazyKporhd0VO46BWK5RVJkmCVbQUJSBxBF4JXahyyEz oe3+KK80zIAluZtMoLnmdLgfSazpFm4ZMzHERnWMqeZpX02QT1HmFNI41Dgh5iD/TwWu DJ+DPqQ5Zn5zOPh/YBU9JxlxRdg7REqa0YFeJ6ksRwWgASnnept7ahi6MWgK/Bp2ULoo EBm5fZ8QKUWykreGsFAzTA+gaV9nuUvpK8jWsUrFfQtbRpAis6mwI2w1IfxxYX+1RIK2 PQ3lU0F37udXKK08RNcmEuiZWd70qXN5v78CWmxrUTHh8mbgGcjRgvo5zG1gZuIt6Q48 pDuw== X-Gm-Message-State: AOJu0YyCbQueuuP8N9oALiMgUq0XyP9bER0H28+d200H2HTePtjbgeUL JCGTx2LBR604gUuhh9IEXMVIEndxiaEM+XGIXas= X-Received: by 2002:a5d:448a:0:b0:31a:ed75:75df with SMTP id j10-20020a5d448a000000b0031aed7575dfmr2319997wrq.15.1702035331963; Fri, 08 Dec 2023 03:35:31 -0800 (PST) Received: from m1x-phil.lan ([176.176.146.181]) by smtp.gmail.com with ESMTPSA id j4-20020a5d4644000000b003333bd63792sm1821183wrs.117.2023.12.08.03.35.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 08 Dec 2023 03:35:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 0/6] sysemu/replay: Restrict icount to TCG system emulation Date: Fri, 8 Dec 2023 12:35:22 +0100 Message-ID: <20231208113529.74067-1-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Slightly simplify non-TCG and user emulation code. This series still adds assertions in ARM INST_RETIRED PMU events, in order to bypass a linking failure. Better would be to restrict ARM PMU events to TCG. Left for another series. Since v2: - Have icount_configure() return bool - Addressed rth's review comments Since v1: - Introduce enum of icount modes - Fix ARM INST_RETIRED event Philippe Mathieu-Daudé (6): sysemu/cpu-timers: Have icount_configure() return a boolean system/vl: Evaluate icount after accelerator options are parsed sysemu/cpu-timers: Introduce ICountMode enumerator target/arm: Ensure icount is enabled when emulating INST_RETIRED util/async: Only call icount_notify_exit() if icount is enabled sysemu/replay: Restrict icount to system emulation include/sysemu/cpu-timers.h | 32 ++++++++++++++++++++++---------- include/sysemu/replay.h | 11 ++++++++--- accel/tcg/icount-common.c | 36 +++++++++++++++++++----------------- stubs/icount.c | 29 ++--------------------------- system/cpu-timers.c | 2 +- system/vl.c | 19 ++++++++++--------- target/arm/helper.c | 5 ++++- util/async.c | 16 +++++++++------- 8 files changed, 75 insertions(+), 75 deletions(-)