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[v3,00/88] target/hppa: Implement hppa64 cpu

Message ID 20231102013016.369010-1-richard.henderson@linaro.org
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Series target/hppa: Implement hppa64 cpu | expand

Message

Richard Henderson Nov. 2, 2023, 1:28 a.m. UTC 
This is the pa2.0 cpu that should populate Helge's C3700 workstation.

I have adjusted both user and system binaries to always support the
64-bit cpu but default to the 32-bit cpu.

Changes for v3:
  * Rebased.
  * Improve TLB lookups and flushing:
    - Separate PSW.P mmu_idx, so that we don't need to flush when
      PSW.P changes.  This was the majority of all TLB flushing.
    - Use an interval tree for TLB lookup, rather than a linear
      search across an array.
  * Incorporate some of Helge's machine patches.


r~


Helge Deller (9):
  target/hppa: sar register allows only 5 bits on 32-bit CPU
  target/hppa: Fix interruption based on default PSW
  target/hppa: Add pa2.0 cpu local tlb flushes
  target/hppa: Clear upper bits in mtctl for pa1.x
  hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region
  hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory
  hw/hppa: Turn on 64-bit CPU for C3700 machine
  hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only
  hw/hppa: Map PDC ROM and I/O memory area into lower memory

Richard Henderson (79):
  target/hppa: Include PSW_P in tb flags and mmu index
  target/hppa: Rename hppa_tlb_entry to HPPATLBEntry
  target/hppa: Use IntervalTreeNode in HPPATLBEntry
  target/hppa: Always report one page to tlb_set_page
  target/hppa: Split out hppa_flush_tlb_range
  target/hppa: Populate an interval tree with valid tlb entries
  tcg: Improve expansion of deposit of constant
  tcg: Improve expansion of deposit into a constant
  target/hppa: Remove get_temp
  target/hppa: Remove get_temp_tl
  target/hppa: Remove load_const
  target/hppa: Fix hppa64 case in machine.c
  target/hppa: Fix load in do_load_32
  target/hppa: Truncate rotate count in trans_shrpw_sar
  target/hppa: Fix trans_ds for hppa64
  target/hppa: Fix do_add, do_sub for hppa64
  target/hppa: Fix bb_sar for hppa64
  target/hppa: Fix extrw and depw with sar for hppa64
  target/hppa: Introduce TYPE_HPPA64_CPU
  target/hppa: Make HPPA_BTLB_ENTRIES variable
  target/hppa: Implement cpu_list
  target/hppa: Implement hppa_cpu_class_by_name
  target/hppa: Update cpu_hppa_get/put_psw for hppa64
  target/hppa: Handle absolute addresses for pa2.0
  target/hppa: Adjust hppa_cpu_dump_state for hppa64
  target/hppa: Fix hppa64 addressing
  target/hppa: Pass DisasContext to copy_iaoq_entry
  target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb]
  target/hppa: Use copy_iaoq_entry for link in do_ibranch
  target/hppa: Mask inputs in copy_iaoq_entry
  target/hppa: Pass d to do_cond
  target/hppa: Pass d to do_sub_cond
  target/hppa: Pass d to do_log_cond
  target/hppa: Pass d to do_sed_cond
  target/hppa: Pass d to do_unit_cond
  linux-user/hppa: Fixes for TARGET_ABI32
  target/hppa: Drop attempted gdbstub support for hppa64
  target/hppa: Remove TARGET_HPPA64
  target/hppa: Decode d for logical instructions
  target/hppa: Decode d for unit instructions
  target/hppa: Decode d for cmpclr instructions
  target/hppa: Decode d for add instructions
  target/hppa: Decode d for sub instructions
  target/hppa: Decode d for bb instructions
  target/hppa: Decode d for cmpb instructions
  target/hppa: Decode CMPIB double-word
  target/hppa: Decode ADDB double-word
  target/hppa: Implement LDD, LDCD, LDDA, STD, STDA
  target/hppa: Implement DEPD, DEPDI
  target/hppa: Implement EXTRD
  target/hppa: Implement SHRPD
  target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM
  target/hppa: Implement STDBY
  target/hppa: Implement IDTLBT, IITLBT
  hw/hppa: Use uint32_t instead of target_ureg
  target/hppa: Remove TARGET_REGISTER_BITS
  target/hppa: Remove most of the TARGET_REGISTER_BITS redirections
  target/hppa: Remove remaining TARGET_REGISTER_BITS redirections
  target/hppa: Adjust vmstate_env for pa2.0 tlb
  target/hppa: Use tcg_temp_new_i64 not tcg_temp_new
  target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64
  target/hppa: Implement HADD
  target/hppa: Implement HSUB
  target/hppa: Implement HAVG
  target/hppa: Implement HSHL, HSHR
  target/hppa: Implement HSHLADD, HSHRADD
  target/hppa: Implement MIXH, MIXW
  target/hppa: Implement PERMH
  target/hppa: Precompute zero into DisasContext
  target/hppa: Return zero for r0 from load_gpr
  include/hw/elf: Remove truncating signed casts
  hw/hppa: Translate phys addresses for the cpu
  linux-user/hppa: Drop EXCP_DUMP from handled exceptions
  target/hppa: Implement pa2.0 data prefetch instructions
  target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system
  target/hppa: Add unwind_breg to CPUHPPAState
  target/hppa: Create raise_exception_with_ior
  target/hppa: Update IIAOQ, IIASQ for pa2.0
  target/hppa: Improve interrupt logging

 configs/targets/hppa-linux-user.mak |    1 +
 include/hw/elf_ops.h                |   17 +-
 linux-user/hppa/target_elf.h        |    2 +-
 target/hppa/cpu-param.h             |   22 +-
 target/hppa/cpu-qom.h               |    1 +
 target/hppa/cpu.h                   |  180 ++-
 target/hppa/helper.h                |   55 +-
 target/hppa/insns.decode            |  189 ++-
 hw/hppa/machine.c                   |  167 ++-
 hw/pci-host/astro.c                 |   11 +-
 linux-user/hppa/cpu_loop.c          |    4 -
 linux-user/hppa/signal.c            |    6 +-
 target/hppa/cpu.c                   |   70 +-
 target/hppa/gdbstub.c               |   32 +-
 target/hppa/helper.c                |  101 +-
 target/hppa/int_helper.c            |   77 +-
 target/hppa/machine.c               |  190 ++-
 target/hppa/mem_helper.c            |  436 ++++--
 target/hppa/op_helper.c             |  310 +++-
 target/hppa/sys_helper.c            |   14 +-
 target/hppa/translate.c             | 2144 ++++++++++++++++-----------
 tcg/tcg-op.c                        |  323 ++--
 target/hppa/trace-events            |    1 +
 23 files changed, 2790 insertions(+), 1563 deletions(-)