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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id k8-20020aa79728000000b006875df4773fsm359576pfg.163.2023.10.31.21.11.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 21:11:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 00/21] target/sparc: Cleanup condition codes etc Date: Tue, 31 Oct 2023 21:11:11 -0700 Message-Id: <20231101041132.174501-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::b2a; envelope-from=richard.henderson@linaro.org; helo=mail-yb1-xb2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This was part of my guess for some of the performance problems. I saw compute_all_sub quite high in the profile at some point, and I believe that the test case has a partially rotated loop such that "cmp" is in a delay slot, and so the gen_compare fast path for CC_OP_SUB is not visible to the conditional branch that uses the output of the compare. Which means that helper_compute_psr gets called more often that we'd like. Since almost all Sparc instructions that set cc also have a version of the instruction that does not set cc, we can trust that the compiler has only used the cc-setting version when it is actually required. Thus, unlike CISC processors, there is very little scope for optimization of the flags -- we might as well compute them immediately. Move away from CC_OP to explicit computation of conditions. This is modeled on target/arm for the (mostly) separate representation of the bits. We can pack icc.[NV] and xcc.[NV] into the same target_ulong, but Z and C cannot share. (For "normal" setting of Z, we could share, but it is possible to set xcc.Z and !icc.Z via explicit write to %ccr, and for that we have to have two variables.) After removing CC_OP, clean up the handling of conditions so that we can minimize additional setcond required for env->cond. Finally, inline some division, which can make use of the new out-of-line exception path, which means we can expand UDIVX and SDIVX with very few host insns. The 64/32 UDIV insn needs only a few more. Leave UDIVcc and SDIV* out of line, as the overflow and saturation computation in these cases is really too large to inline. r~ Richard Henderson (21): target/sparc: Introduce cpu_put_psr_icc target/sparc: Split psr and xcc into components target/sparc: Remove CC_OP_LOGIC target/sparc: Remove CC_OP_DIV target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV target/sparc: Remove CC_OP leftovers target/sparc: Remove DisasCompare.is_bool target/sparc: Change DisasCompare.c2 to int target/sparc: Always copy conditions into a new temporary target/sparc: Do flush_cond in advance_jump_cond target/sparc: Merge gen_branch2 into advance_pc target/sparc: Merge advance_jump_uncond_{never,always} into advance_jump_cond target/sparc: Pass displacement to advance_jump_cond target/sparc: Merge gen_op_next_insn into only caller target/sparc: Record entire jump condition in DisasContext target/sparc: Discard cpu_cond at the end of each insn target/sparc: Implement UDIVX and SDIVX inline target/sparc: Implement UDIV inline target/sparc: Check for invalid cond in gen_compare_reg linux-user/sparc/target_cpu.h | 17 +- target/sparc/cpu.h | 58 +- target/sparc/helper.h | 12 +- target/sparc/insns.decode | 7 +- linux-user/sparc/cpu_loop.c | 11 +- linux-user/sparc/signal.c | 2 +- target/sparc/cc_helper.c | 471 ------------ target/sparc/cpu.c | 1 - target/sparc/helper.c | 171 ++--- target/sparc/int32_helper.c | 5 - target/sparc/int64_helper.c | 5 - target/sparc/machine.c | 45 +- target/sparc/translate.c | 1333 ++++++++++++++------------------- target/sparc/win_helper.c | 56 +- target/sparc/meson.build | 1 - 15 files changed, 789 insertions(+), 1406 deletions(-) delete mode 100644 target/sparc/cc_helper.c Tested-by: Mark Cave-Ayland Acked-by: Mark Cave-Ayland