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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id p26-20020a1709060dda00b0099bc08862b6sm7123316eji.171.2023.10.09.10.14.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 10:14:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Herv=C3=A9_Poussineau?= , =?utf-8?q?Phil?= =?utf-8?q?ippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex_Ben?= =?utf-8?q?n=C3=A9e?= , Aleksandar Rikalo , Aurelien Jarno , Jiaxun Yang , Richard Henderson , Huacai Chen Subject: [PATCH 0/3] hw/mips: Cleanup in preparation of heterogenous prototype Date: Mon, 9 Oct 2023 19:14:40 +0200 Message-ID: <20231009171443.12145-1-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Prepare few MIPS hardware to be integrated in a heterogeneous machine: - Restrict MIPS-specific HW declaration to target/mips/ - Replace MIPSCPU by ArchCPU in common HW Philippe Mathieu-Daudé (3): hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h' hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h' hw/misc/mips_itu: Make MIPSITUState target agnostic include/hw/mips/cpudevs.h | 14 -------------- include/hw/misc/mips_itu.h | 4 +++- target/mips/cpu.h | 7 +++---- hw/mips/cps.c | 1 - hw/mips/fuloong2e.c | 1 - hw/mips/jazz.c | 1 - hw/mips/loongson3_virt.c | 1 - hw/mips/malta.c | 1 - hw/mips/mips_int.c | 1 - hw/mips/mipssim.c | 1 - hw/misc/mips_itu.c | 4 ++-- target/mips/sysemu/cp0_timer.c | 1 - target/mips/tcg/sysemu/cp0_helper.c | 1 + target/mips/tcg/sysemu/tlb_helper.c | 1 - 14 files changed, 9 insertions(+), 30 deletions(-) delete mode 100644 include/hw/mips/cpudevs.h Reviewed-by: Richard Henderson