From patchwork Fri Aug 18 22:13:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 714696 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp748940wrs; Fri, 18 Aug 2023 15:15:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEig4zd8AgIMV92eRghvE6oO0HIrkz+/9A7Bk8im/8Uw1ymHE2ke7ukV/iWSKbzeC49XX2a X-Received: by 2002:a05:6358:5e0f:b0:134:df5e:4776 with SMTP id q15-20020a0563585e0f00b00134df5e4776mr538857rwn.24.1692396905748; Fri, 18 Aug 2023 15:15:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692396905; cv=none; d=google.com; s=arc-20160816; b=w9D2kAGjq5FosoDH3RcblNx6od7c4W3k/QrbVOe/F0vtvApRx6SPWE/ZzIvVB7F3NT ATrQTFNgVKWioIRN73Y/DYtxcVt5MKDXRVQtHhtqxoy9N4UR4odeJeDp9kfTrlsF+azT a8LfB4WPGqQOXCh1389P2BO6WsgcA74ZIxTeqEHAEpQyW7fYLCAtpJRbIYZo+yu6+ntg fJGk2fFq8YohH3ehL2hhIXSIgiDihJsn3Bjk+0N/gpKqIe+R7TZcb5nBQLz/sQ4huYNY 7GQ57rWQ8ZYC8q7KuZMeqdeWjk2aRFTw1kPkGkKdah7bGXZhT2FVgSy6Ol///wPsBn3D G8uw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:dkim-signature; bh=PpfItaz3tt0i3+oBgiUE0ScVCwqJMcf75OhTCKNQzPg=; fh=B7NWzFxYZC75qmskv9QyT+FRIpA3S3exHC94y2g+kbI=; b=lr8tGlIV38Jres8dNToY20aWwy9SK8YiedKLQ13W48DOr8SFT48IdmmFmYDNuNHn+p AYg/BSGXzaxUSbkEHznHxVu8xIGC+nBZ+QQig1p5fCY68+wCAWo4z1wAp1cjEGfi4cVq 3iIFT7iJgczK2ljfsUDpULwLGiut3zCTGWx3qwOwroV3KAISJPw6JQqTvuU/H9KLA0gb pkMAfW/beSD3mW6B/z32ansl9hgSTGKjajyaMifaW19HK96IfISr1PJ5esB0mWFuCKva J13z2RGNN4cehjwHjJJt1my5pf+e2KmGbvQInpj4GeYVEs8SCL0xa53wD/Do7jP+2a3G XUDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x6n0OcmH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y19-20020a0ce053000000b0063d1238bbe6si1894893qvk.533.2023.08.18.15.15.05 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 18 Aug 2023 15:15:05 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x6n0OcmH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qX7ir-0004uj-NN; Fri, 18 Aug 2023 18:13:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qX7ip-0004th-QS for qemu-devel@nongnu.org; Fri, 18 Aug 2023 18:13:35 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qX7il-0004LR-7g for qemu-devel@nongnu.org; Fri, 18 Aug 2023 18:13:35 -0400 Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-689f9576babso1189360b3a.0 for ; Fri, 18 Aug 2023 15:13:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1692396809; x=1693001609; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=PpfItaz3tt0i3+oBgiUE0ScVCwqJMcf75OhTCKNQzPg=; b=x6n0OcmHlImhSHXkh7ltvWwZiHvCUgdTAy/0697tJSujSFyb3/O4CVbT8LycPqyP33 NPUrGn6/teLakg1Fh5v7ZSiyCATKekh5G6gCOMZn+pkXOXwEpKriG7FfvhTxUX4wGQYM jFYh+HjU0dZvm4IpbVracrpE31z9zUhsVXNZgMOUxgpKRQ735MJY2uw9bDZKjDNnZfab CRg0J4SBNHaY0SHt39siRpEREE9vL07hw75f+J0cqUm4u2p/KNQlKM+gom9wX4ocXQAo /L1FuUDK7G1ytQCB7DjEv7mKRO2h0E9JywoG7Q0plKoEzN+HNUGHUQ0coaXEz0YlEqvB uEYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692396809; x=1693001609; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=PpfItaz3tt0i3+oBgiUE0ScVCwqJMcf75OhTCKNQzPg=; b=fp5WHoHvtfTbwjiDd99XPF6/VbbU1kY68dSPBw+5UscMORvn9jDk65f/EJ1vMBs6J3 6+Uk/gVnCHaZ2jaeZPCn6E0VOLQU6BwCJyjqw9KSteBvr9z74SYSG3wJBxQpGLh7tdld UlYSScg1dotwBFC5oC96kvL6NeFRZfY5aHWOGVPyuJ5BLIrsRxwFph4t2B2z8louKKWU V0+7Sei8Dg8DVCgNs54fcPd1sjrASBMgvQ/dD0qLvyguNe4K6Ow+tUFdhPjlrGbfpVVC G12DrsKR3Lk/pSlN6F7QwDqnMaErz4gW1Rh5manVOhvKEg77vojfXOmtOr3wQMVXjHJY XA9w== X-Gm-Message-State: AOJu0YwMCsrutZw1CvjNn4cNJgHaOU07mRQAvV4K4Z15V1/fMuSUbOS3 6rKkuMuHSQVbrvnDiSprDrLsmYCDjrXMv5wBmQk= X-Received: by 2002:a05:6a20:2455:b0:122:10f9:f635 with SMTP id t21-20020a056a20245500b0012210f9f635mr691052pzc.19.1692396808811; Fri, 18 Aug 2023 15:13:28 -0700 (PDT) Received: from stoup.. ([2602:47:d483:7301:cf24:6daf:2b9e:7972]) by smtp.gmail.com with ESMTPSA id y7-20020a17090322c700b001bdb85291casm2231417plg.208.2023.08.18.15.13.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Aug 2023 15:13:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Thomas Huth , qemu-s390x@nongnu.org Subject: [PATCH v2 00/23] tcg: Introduce negsetcond opcodes Date: Fri, 18 Aug 2023 15:13:04 -0700 Message-Id: <20230818221327.150194-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Introduce two new setcond opcode variants which produce -1 instead of 1 when the condition. For most of our hosts, producing -1 is just as easy as 1, and avoid requiring a separate negate instruction. Use the new opcode in tcg/tcg-op-gvec.c for integral expansion of generic vector operations. I looked through target/ for obvious pairings of setcond and neg. Changes for v2: * Drop "tcg/i386: Add cf parameter to tcg_out_cmp" patch. Patches needing review: 15: tcg/s390x: Implement negsetcond_* r~ Cc: Thomas Huth Cc: qemu-s390x@nongnu.org Richard Henderson (23): tcg: Introduce negsetcond opcodes tcg: Use tcg_gen_negsetcond_* target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero target/arm: Use tcg_gen_negsetcond_* target/m68k: Use tcg_gen_negsetcond_* target/openrisc: Use tcg_gen_negsetcond_* target/ppc: Use tcg_gen_negsetcond_* target/sparc: Use tcg_gen_movcond_i64 in gen_edge target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl tcg/ppc: Implement negsetcond_* tcg/ppc: Use the Set Boolean Extension tcg/aarch64: Implement negsetcond_* tcg/arm: Implement negsetcond_i32 tcg/riscv: Implement negsetcond_* tcg/s390x: Implement negsetcond_* tcg/sparc64: Implement negsetcond_* tcg/i386: Merge tcg_out_brcond{32,64} tcg/i386: Merge tcg_out_setcond{32,64} tcg/i386: Merge tcg_out_movcond{32,64} tcg/i386: Use CMP+SBB in tcg_out_setcond tcg/i386: Clear dest first in tcg_out_setcond if possible tcg/i386: Use shift in tcg_out_setcond tcg/i386: Implement negsetcond_* docs/devel/tcg-ops.rst | 6 + include/tcg/tcg-op-common.h | 4 + include/tcg/tcg-op.h | 2 + include/tcg/tcg-opc.h | 2 + include/tcg/tcg.h | 1 + tcg/aarch64/tcg-target.h | 2 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 2 + tcg/loongarch64/tcg-target.h | 3 + tcg/mips/tcg-target.h | 2 + tcg/ppc/tcg-target.h | 2 + tcg/riscv/tcg-target.h | 2 + tcg/s390x/tcg-target.h | 2 + tcg/sparc64/tcg-target.h | 2 + tcg/tci/tcg-target.h | 2 + target/alpha/translate.c | 7 +- target/arm/tcg/translate-a64.c | 22 +- target/arm/tcg/translate.c | 12 +- target/m68k/translate.c | 24 +- target/openrisc/translate.c | 6 +- target/sparc/translate.c | 17 +- target/tricore/translate.c | 16 +- tcg/optimize.c | 41 +++- tcg/tcg-op-gvec.c | 6 +- tcg/tcg-op.c | 42 +++- tcg/tcg.c | 6 + target/ppc/translate/fixedpoint-impl.c.inc | 6 +- target/ppc/translate/vmx-impl.c.inc | 8 +- tcg/aarch64/tcg-target.c.inc | 12 + tcg/arm/tcg-target.c.inc | 9 + tcg/i386/tcg-target.c.inc | 255 +++++++++++++-------- tcg/ppc/tcg-target.c.inc | 149 ++++++++---- tcg/riscv/tcg-target.c.inc | 45 ++++ tcg/s390x/tcg-target.c.inc | 78 ++++--- tcg/sparc64/tcg-target.c.inc | 36 ++- 35 files changed, 567 insertions(+), 265 deletions(-)