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[88.28.3.230]) by smtp.gmail.com with ESMTPSA id k9-20020a7bc409000000b003f9b24cf881sm10466573wmi.16.2023.06.22.09.08.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 22 Jun 2023 09:08:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Reinoud Zandijk , qemu-arm@nongnu.org, kvm@vger.kernel.org, Marcel Apfelbaum , Stefano Stabellini , Anthony Perard , Yanan Wang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Roman Bolshakov , Paolo Bonzini , Paul Durrant , Sunil Muthuswamy , Alexander Graf , Richard Henderson , xen-devel@lists.xenproject.org, Eduardo Habkost , Cameron Esfahani Subject: [PATCH v2 00/16] accel: Share CPUState accel context (HAX/NVMM/WHPX/HVF) Date: Thu, 22 Jun 2023 18:08:07 +0200 Message-Id: <20230622160823.71851-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This series is part of the single binary effort. All accelerator will share their per-vCPU context in an opaque 'accel' pointer within the CPUState. First handle HAX/NVMM/WHPX/HVF. KVM and TCG will follow as two different (bigger) follow-up series. Since v1: - Addressed rth's review comments - Added rth's R-b tag - Converted HVF intel (untested) - Rebased Philippe Mathieu-Daudé (16): MAINTAINERS: Update Roman Bolshakov email address accel: Document generic accelerator headers accel: Remove unused hThread variable on TCG/WHPX accel: Fix a leak on Windows HAX accel: Destroy HAX vCPU threads once done accel: Rename 'hax_vcpu' as 'accel' in CPUState accel: Rename HAX 'struct hax_vcpu_state' -> AccelCPUState accel: Move HAX hThread to accelerator context accel: Remove NVMM unreachable error path accel: Rename NVMM 'struct qemu_vcpu' -> AccelCPUState accel: Inline NVMM get_qemu_vcpu() accel: Remove WHPX unreachable error path accel: Rename WHPX 'struct whpx_vcpu' -> AccelCPUState accel: Inline WHPX get_whpx_vcpu() accel: Rename 'cpu_state' -> 'cpu' accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState MAINTAINERS | 4 +- include/hw/core/cpu.h | 10 +- include/sysemu/hax.h | 2 + include/sysemu/hvf_int.h | 2 +- include/sysemu/kvm.h | 2 + include/sysemu/nvmm.h | 2 + include/sysemu/tcg.h | 2 + include/sysemu/whpx.h | 2 + include/sysemu/xen.h | 2 + target/i386/hax/hax-i386.h | 14 +- target/i386/hvf/vmx.h | 22 +- target/i386/hvf/x86hvf.h | 12 +- accel/hvf/hvf-accel-ops.c | 18 +- accel/tcg/tcg-accel-ops-mttcg.c | 4 - accel/tcg/tcg-accel-ops-rr.c | 3 - target/arm/hvf/hvf.c | 108 ++++----- target/i386/hax/hax-accel-ops.c | 5 +- target/i386/hax/hax-all.c | 26 ++- target/i386/hax/hax-posix.c | 4 +- target/i386/hax/hax-windows.c | 6 +- target/i386/hvf/hvf.c | 104 ++++----- target/i386/hvf/x86.c | 28 +-- target/i386/hvf/x86_descr.c | 26 +-- target/i386/hvf/x86_emu.c | 62 ++--- target/i386/hvf/x86_mmu.c | 4 +- target/i386/hvf/x86_task.c | 10 +- target/i386/hvf/x86hvf.c | 364 +++++++++++++++--------------- target/i386/nvmm/nvmm-all.c | 42 ++-- target/i386/whpx/whpx-accel-ops.c | 3 - target/i386/whpx/whpx-all.c | 45 ++-- .mailmap | 3 +- 31 files changed, 462 insertions(+), 479 deletions(-) Reviewed-by: Richard Henderson