mbox series

[v3,0/5] tcg: Issue memory barriers for guest memory model

Message ID 20230619142333.429028-1-richard.henderson@linaro.org
Headers show
Series tcg: Issue memory barriers for guest memory model | expand

Message

Richard Henderson June 19, 2023, 2:23 p.m. UTC 
v1: https://lore.kernel.org/qemu-devel/20210316220735.2048137-1-richard.henderson@linaro.org/
v2: https://lore.kernel.org/qemu-devel/20230306015710.1868853-1-richard.henderson@linaro.org/

Changes for v3:
  * Update for tcg-built-once.
  * Require TCG_GUEST_DEFAULT_MO if TARGET_SUPPORTS_MTTCG.


r~


Richard Henderson (5):
  target/microblaze: Define TCG_GUEST_DEFAULT_MO
  tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
  tcg: Elide memory barriers implied by the host memory model
  tcg: Add host memory barriers to cpu_ldst.h interfaces
  accel/tcg: Remove check_tcg_memory_orders_compatible

 accel/tcg/internal.h    | 34 ++++++++++++++++++++++++++++++++++
 target/microblaze/cpu.h |  3 +++
 accel/tcg/cputlb.c      | 10 ++++++++++
 accel/tcg/tcg-all.c     | 39 ++++++++++-----------------------------
 accel/tcg/user-exec.c   | 10 ++++++++++
 tcg/tcg-op.c            | 20 ++++++++++++++++++--
 6 files changed, 85 insertions(+), 31 deletions(-)

Comments

Richard Henderson June 19, 2023, 2:43 p.m. UTC | #1 
On 6/19/23 16:23, Richard Henderson wrote:
> v1: https://lore.kernel.org/qemu-devel/20210316220735.2048137-1-richard.henderson@linaro.org/
> v2: https://lore.kernel.org/qemu-devel/20230306015710.1868853-1-richard.henderson@linaro.org/
> 
> Changes for v3:
>    * Update for tcg-built-once.
>    * Require TCG_GUEST_DEFAULT_MO if TARGET_SUPPORTS_MTTCG.

I just noticed that patches 2,3,5 were reviewed (thanks phil)
and I failed to copy the r-b.  I have now done so.


r~

> Richard Henderson (5):
>    target/microblaze: Define TCG_GUEST_DEFAULT_MO
>    tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
>    tcg: Elide memory barriers implied by the host memory model
>    tcg: Add host memory barriers to cpu_ldst.h interfaces
>    accel/tcg: Remove check_tcg_memory_orders_compatible
> 
>   accel/tcg/internal.h    | 34 ++++++++++++++++++++++++++++++++++
>   target/microblaze/cpu.h |  3 +++
>   accel/tcg/cputlb.c      | 10 ++++++++++
>   accel/tcg/tcg-all.c     | 39 ++++++++++-----------------------------
>   accel/tcg/user-exec.c   | 10 ++++++++++
>   tcg/tcg-op.c            | 20 ++++++++++++++++++--
>   6 files changed, 85 insertions(+), 31 deletions(-)
Richard Henderson June 26, 2023, 10:52 a.m. UTC | #2 
On 6/19/23 16:23, Richard Henderson wrote:
> v1: https://lore.kernel.org/qemu-devel/20210316220735.2048137-1-richard.henderson@linaro.org/
> v2: https://lore.kernel.org/qemu-devel/20230306015710.1868853-1-richard.henderson@linaro.org/
> 
> Changes for v3:
>    * Update for tcg-built-once.
>    * Require TCG_GUEST_DEFAULT_MO if TARGET_SUPPORTS_MTTCG.
> 
> 
> r~
> 
> 
> Richard Henderson (5):
>    target/microblaze: Define TCG_GUEST_DEFAULT_MO
>    tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
>    tcg: Elide memory barriers implied by the host memory model
>    tcg: Add host memory barriers to cpu_ldst.h interfaces
>    accel/tcg: Remove check_tcg_memory_orders_compatible
> 
>   accel/tcg/internal.h    | 34 ++++++++++++++++++++++++++++++++++
>   target/microblaze/cpu.h |  3 +++
>   accel/tcg/cputlb.c      | 10 ++++++++++
>   accel/tcg/tcg-all.c     | 39 ++++++++++-----------------------------
>   accel/tcg/user-exec.c   | 10 ++++++++++
>   tcg/tcg-op.c            | 20 ++++++++++++++++++--
>   6 files changed, 85 insertions(+), 31 deletions(-)
> 

Applied to tcg-next.


r~