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Iglesias" , Paolo Bonzini , Marcel Apfelbaum , Robert Hoo , Yanan Wang , qemu-arm@nongnu.org, Peter Maydell , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= , Palmer Dabbelt , Like Xu , Alistair Francis , Zhao Liu , Eduardo Habkost Subject: [PATCH 0/5] hw/cpu/cluster: Restrict CPU cluster to a particular CPU type Date: Thu, 16 Feb 2023 15:23:33 +0100 Message-Id: <20230216142338.82982-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Following Alex's comment [1] on "Introduce hybrid CPU topology" RFC [2], this series strengthen a bit the CPU cluster by restricting it to a particular CPU type. We'd rather have a single way of creating heterogeneous (hybrid) CPU topology. Note the CPU cluster is not user-creatable, so few more work is required in this area. Based-on: <20230216122524.67212-1-philmd@linaro.org> [3] "Have object_child_foreach() take Error* and return boolean" [1] https://lore.kernel.org/qemu-devel/87y1p1c18a.fsf@linaro.org/ [2] https://lore.kernel.org/qemu-devel/20230213095035.158240-1-zhao1.liu@linux.intel.com/ [3] https://lore.kernel.org/qemu-devel/20230216122524.67212-1-philmd@linaro.org/ Philippe Mathieu-Daudé (5): hw/cpu: Extend CPUState::cluster_index documentation hw/cpu/cluster: Only add CPU objects to CPU cluster hw/cpu/cluster: Restrict CPU cluster to a particular CPU type hw/arm: Restrict CPU clusters to the expected type hw/riscv: Restrict CPU clusters to the expected type accel/tcg/tcg-accel-ops.c | 13 ++++++++++++- hw/arm/armsse.c | 1 + hw/arm/xlnx-zynqmp.c | 4 ++++ hw/cpu/cluster.c | 33 +++++++++++++++++++++++++++------ hw/riscv/microchip_pfsoc.c | 4 ++++ hw/riscv/sifive_u.c | 2 ++ include/hw/core/cpu.h | 2 ++ include/hw/cpu/cluster.h | 1 + 8 files changed, 53 insertions(+), 7 deletions(-)