mbox series

[v4,00/24] target/arm: Implement FEAT_HAFDBS

Message ID 20221011031911.2408754-1-richard.henderson@linaro.org
Headers show
Series target/arm: Implement FEAT_HAFDBS | expand

Message

Richard Henderson Oct. 11, 2022, 3:18 a.m. UTC 
Changes for v4:
  * Rebase on today's target-arm.next pull, including 21 patches.
  * Split AF and DB enablement into two patches.
  * Perform only one atomic update per PTE.
  * Raise Permission fault if atomic update reqd to read-only PTE.
  * More use of S1Translate struct, which is perhaps now mis-named but
    more generally useful/used; suggestions for better naming solicited.
  * Other minor updates per review.


r~


Based-on: 20221010142730.502083-1-peter.maydell@linaro.org
("[PULL 00/28] target-arm queue")


Richard Henderson (24):
  target/arm: Enable TARGET_PAGE_ENTRY_EXTRA
  target/arm: Use probe_access_full for MTE
  target/arm: Use probe_access_full for BTI
  target/arm: Add ARMMMUIdx_Phys_{S,NS}
  target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx
  target/arm: Restrict tlb flush from vttbr_write to vmid change
  target/arm: Split out S1Translate type
  target/arm: Plumb debug into S1Translate
  target/arm: Move be test for regime into S1TranslateResult
  target/arm: Use softmmu tlbs for page table walking
  target/arm: Split out get_phys_addr_twostage
  target/arm: Use bool consistently for get_phys_addr subroutines
  target/arm: Add ptw_idx to S1Translate
  target/arm: Add isar predicates for FEAT_HAFDBS
  target/arm: Extract HA and HD in aa64_va_parameters
  target/arm: Move S1_ptw_translate outside arm_ld[lq]_ptw
  target/arm: Add ARMFault_UnsuppAtomicUpdate
  target/arm: Remove loop from get_phys_addr_lpae
  target/arm: Fix fault reporting in get_phys_addr_lpae
  target/arm: Don't shift attrs in get_phys_addr_lpae
  target/arm: Consider GP an attribute in get_phys_addr_lpae
  target/arm: Implement FEAT_HAFDBS, access flag portion
  target/arm: Implement FEAT_HAFDBS, dirty bit portion
  target/arm: Use the max page size in a 2-stage ptw

 docs/system/arm/emulation.rst  |   1 +
 target/arm/cpu-param.h         |  15 +-
 target/arm/cpu.h               |  57 +-
 target/arm/internals.h         |   7 +
 target/arm/sve_ldst_internal.h |   1 +
 target/arm/cpu64.c             |   1 +
 target/arm/helper.c            | 163 ++++--
 target/arm/mte_helper.c        |  62 +--
 target/arm/ptw.c               | 945 ++++++++++++++++++++++-----------
 target/arm/sve_helper.c        |  54 +-
 target/arm/tlb_helper.c        |  24 +-
 target/arm/translate-a64.c     |  21 +-
 12 files changed, 862 insertions(+), 489 deletions(-)

Comments

Peter Maydell Oct. 17, 2022, 12:49 p.m. UTC | #1 
On Tue, 11 Oct 2022 at 04:21, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Changes for v4:
>   * Rebase on today's target-arm.next pull, including 21 patches.
>   * Split AF and DB enablement into two patches.
>   * Perform only one atomic update per PTE.
>   * Raise Permission fault if atomic update reqd to read-only PTE.
>   * More use of S1Translate struct, which is perhaps now mis-named but
>     more generally useful/used; suggestions for better naming solicited.
>   * Other minor updates per review.

I'm taking patches 1-12 into target-arm.next.

thanks
-- PMM