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[v4,0/9] target/arm: pc-relative translation blocks

Message ID 20220906100528.343244-1-richard.henderson@linaro.org
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Series target/arm: pc-relative translation blocks | expand

Message

Richard Henderson Sept. 6, 2022, 10:05 a.m. UTC 
This is the Arm specific changes required to reduce the
amount of translation for address space randomization.
This is a re-base and split, with no other significant
changes over v3.


r~


Based-on: 20220906091126.298041-1-richard.henderson@linaro.org
("[PATCH v4 0/7] tcg: pc-relative translation blocks")

branch: https://gitlab.com/rth7680/qemu/-/tree/tgt-arm-pcrel


Richard Henderson (9):
  target/arm: Introduce curr_insn_len
  target/arm: Change gen_goto_tb to work on displacements
  target/arm: Change gen_*set_pc_im to gen_*update_pc
  target/arm: Change gen_exception_insn* to work on displacements
  target/arm: Change gen_exception_internal to work on displacements
  target/arm: Change gen_jmp* to work on displacements
  target/arm: Introduce gen_pc_plus_diff for aarch64
  target/arm: Introduce gen_pc_plus_diff for aarch32
  target/arm: Enable TARGET_TB_PCREL

 target/arm/cpu-param.h        |   2 +
 target/arm/translate-a32.h    |   2 +-
 target/arm/translate.h        |  21 ++-
 target/arm/cpu.c              |  23 ++--
 target/arm/translate-a64.c    | 174 +++++++++++++++----------
 target/arm/translate-m-nocp.c |   6 +-
 target/arm/translate-mve.c    |   2 +-
 target/arm/translate-vfp.c    |  10 +-
 target/arm/translate.c        | 232 +++++++++++++++++++++-------------
 9 files changed, 288 insertions(+), 184 deletions(-)