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([2602:ae:154e:e201:a7aa:1d1d:c857:5500]) by smtp.gmail.com with ESMTPSA id h9-20020a056a00000900b0052dee21fecdsm1914761pfk.77.2022.08.12.11.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Aug 2022 11:08:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, iii@linux.ibm.com, alex.bennee@linaro.org Subject: [PATCH for-7.2 00/21] accel/tcg: minimize tlb lookups during translate + user-only PROT_EXEC fixes Date: Fri, 12 Aug 2022 11:07:45 -0700 Message-Id: <20220812180806.2128593-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is part of a larger body of work, but in the process of reorganizing I was reminded that PROT_EXEC wasn't being enforced properly for user-only. As this has come up in the context of some of Ilya's patches, I thought I'd go ahead and post this part. r~ Ilya Leoshkevich (1): accel/tcg: Introduce is_same_page() Richard Henderson (20): linux-user/arm: Mark the commpage executable linux-user/hppa: Allocate page zero as a commpage linux-user/x86_64: Allocate vsyscall page as a commpage linux-user: Honor PT_GNU_STACK tests/tcg/i386: Move smc_code2 to an executable section accel/tcg: Remove PageDesc code_bitmap accel/tcg: Use bool for page_find_alloc accel/tcg: Merge tb_htable_lookup into caller accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c accel/tcg: Properly implement get_page_addr_code for user-only accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp accel/tcg: Add nofault parameter to get_page_addr_code_hostp accel/tcg: Unlock mmap_lock after longjmp accel/tcg: Hoist get_page_addr_code out of tb_lookup accel/tcg: Hoist get_page_addr_code out of tb_gen_code accel/tcg: Raise PROT_EXEC exception early accel/tcg: Remove translator_ldsw accel/tcg: Add pc and host_pc params to gen_intermediate_code accel/tcg: Add fast path for translator_ld* accel/tcg: Use DisasContextBase in plugin_gen_tb_start accel/tcg/internal.h | 7 +- include/elf.h | 1 + include/exec/cpu-common.h | 1 + include/exec/exec-all.h | 87 +++++----------- include/exec/plugin-gen.h | 7 +- include/exec/translator.h | 85 ++++++++++++---- linux-user/arm/target_cpu.h | 4 +- linux-user/qemu.h | 1 + accel/tcg/cpu-exec.c | 184 ++++++++++++++++++---------------- accel/tcg/cputlb.c | 93 +++++------------ accel/tcg/plugin-gen.c | 23 +++-- accel/tcg/translate-all.c | 120 ++++------------------ accel/tcg/translator.c | 122 +++++++++++++++++----- accel/tcg/user-exec.c | 15 +++ linux-user/elfload.c | 80 ++++++++++++++- softmmu/physmem.c | 12 +++ target/alpha/translate.c | 5 +- target/arm/translate.c | 5 +- target/avr/translate.c | 5 +- target/cris/translate.c | 5 +- target/hexagon/translate.c | 6 +- target/hppa/translate.c | 5 +- target/i386/tcg/translate.c | 7 +- target/loongarch/translate.c | 6 +- target/m68k/translate.c | 5 +- target/microblaze/translate.c | 5 +- target/mips/tcg/translate.c | 5 +- target/nios2/translate.c | 5 +- target/openrisc/translate.c | 6 +- target/ppc/translate.c | 5 +- target/riscv/translate.c | 5 +- target/rx/translate.c | 5 +- target/s390x/tcg/translate.c | 5 +- target/sh4/translate.c | 5 +- target/sparc/translate.c | 5 +- target/tricore/translate.c | 6 +- target/xtensa/translate.c | 6 +- tests/tcg/i386/test-i386.c | 2 +- 38 files changed, 532 insertions(+), 424 deletions(-)