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[v4,00/45] target/arm: Cleanups, new features, new cpus

Message ID 20220501055028.646596-1-richard.henderson@linaro.org
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Series target/arm: Cleanups, new features, new cpus | expand

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Richard Henderson May 1, 2022, 5:49 a.m. UTC 
Changes for v4:
  * Rebase on master, where the first third is upstream.
  * Split changes to add_cpreg_to_hashtable into bite sized chunks.
  * Add ARM_CP_EL3_NO_EL2_{UNDEF,KEEP} flags.
  * Fix access check for SCXTNUM_ELx (damien).

Patches lacking review:
  05-target-arm-Reorg-ARMCPRegInfo-type-field-bits.patch
  06-target-arm-Avoid-bare-abort-or-assert-0.patch
  10-target-arm-Drop-always-true-test-in-define_arm_vh.patch
  11-target-arm-Store-cpregs-key-in-the-hash-table-dir.patch
  12-target-arm-Merge-allocation-of-the-cpreg-and-its-.patch
  13-target-arm-Hoist-computation-of-key-in-add_cpreg_.patch
  14-target-arm-Consolidate-cpreg-updates-in-add_cpreg.patch
  15-target-arm-Use-bool-for-is64-and-ns-in-add_cpreg_.patch
  16-target-arm-Hoist-isbanked-computation-in-add_cpre.patch
  17-target-arm-Perform-override-check-early-in-add_cp.patch
  18-target-arm-Reformat-comments-in-add_cpreg_to_hash.patch
  19-target-arm-Remove-HOST_BIG_ENDIAN-ifdef-in-add_cp.patch
  20-target-arm-Handle-cpreg-registration-for-missing-.patch
  21-target-arm-Drop-EL3-no-EL2-fallbacks.patch
  22-target-arm-Merge-zcr-reginfo.patch
  34-target-arm-Add-minimal-RAS-registers.patch
  41-target-arm-Enable-FEAT_CSV2_2-for-cpu-max.patch


r~


Richard Henderson (45):
  target/arm: Split out cpregs.h
  target/arm: Reorg CPAccessResult and access_check_cp_reg
  target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h
  target/arm: Make some more cpreg data static const
  target/arm: Reorg ARMCPRegInfo type field bits
  target/arm: Avoid bare abort() or assert(0)
  target/arm: Change cpreg access permissions to enum
  target/arm: Name CPState type
  target/arm: Name CPSecureState type
  target/arm: Drop always-true test in
    define_arm_vh_e2h_redirects_aliases
  target/arm: Store cpregs key in the hash table directly
  target/arm: Merge allocation of the cpreg and its name
  target/arm: Hoist computation of key in add_cpreg_to_hashtable
  target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable
  target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable
  target/arm: Hoist isbanked computation in add_cpreg_to_hashtable
  target/arm: Perform override check early in add_cpreg_to_hashtable
  target/arm: Reformat comments in add_cpreg_to_hashtable
  target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable
  target/arm: Handle cpreg registration for missing EL
  target/arm: Drop EL3 no EL2 fallbacks
  target/arm: Merge zcr reginfo
  target/arm: Add isar predicates for FEAT_Debugv8p2
  target/arm: Adjust definition of CONTEXTIDR_EL2
  target/arm: Move cortex impdef sysregs to cpu_tcg.c
  target/arm: Update qemu-system-arm -cpu max to cortex-a57
  target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max
  target/arm: Split out aa32_max_features
  target/arm: Annotate arm_max_initfn with FEAT identifiers
  target/arm: Use field names for manipulating EL2 and EL3 modes
  target/arm: Enable FEAT_Debugv8p2 for -cpu max
  target/arm: Enable FEAT_Debugv8p4 for -cpu max
  target/arm: Add isar_feature_{aa64,any}_ras
  target/arm: Add minimal RAS registers
  target/arm: Enable SCR and HCR bits for RAS
  target/arm: Implement virtual SError exceptions
  target/arm: Implement ESB instruction
  target/arm: Enable FEAT_RAS for -cpu max
  target/arm: Enable FEAT_IESB for -cpu max
  target/arm: Enable FEAT_CSV2 for -cpu max
  target/arm: Enable FEAT_CSV2_2 for -cpu max
  target/arm: Enable FEAT_CSV3 for -cpu max
  target/arm: Enable FEAT_DGH for -cpu max
  target/arm: Define cortex-a76
  target/arm: Define neoverse-n1

 docs/system/arm/emulation.rst |  10 +
 docs/system/arm/virt.rst      |   2 +
 target/arm/cpregs.h           | 462 +++++++++++++++++
 target/arm/cpu.h              | 416 ++--------------
 target/arm/helper.h           |   1 +
 target/arm/internals.h        |  16 +
 target/arm/syndrome.h         |   5 +
 target/arm/a32.decode         |  16 +-
 target/arm/t32.decode         |  18 +-
 hw/arm/pxa2xx.c               |   2 +-
 hw/arm/pxa2xx_pic.c           |   2 +-
 hw/arm/sbsa-ref.c             |   2 +
 hw/arm/virt.c                 |   2 +
 hw/intc/arm_gicv3_cpuif.c     |   6 +-
 hw/intc/arm_gicv3_kvm.c       |   3 +-
 target/arm/cpu.c              |  84 ++--
 target/arm/cpu64.c            | 353 +++++++------
 target/arm/cpu_tcg.c          | 232 ++++++---
 target/arm/gdbstub.c          |   5 +-
 target/arm/helper.c           | 909 ++++++++++++++++++----------------
 target/arm/hvf/hvf.c          |   2 +-
 target/arm/kvm-stub.c         |   4 +-
 target/arm/kvm.c              |   4 +-
 target/arm/machine.c          |   4 +-
 target/arm/op_helper.c        | 100 ++--
 target/arm/translate-a64.c    |  32 +-
 target/arm/translate-neon.c   |   2 +-
 target/arm/translate.c        |  36 +-
 28 files changed, 1604 insertions(+), 1126 deletions(-)
 create mode 100644 target/arm/cpregs.h

Comments

Peter Maydell May 3, 2022, 4:47 p.m. UTC | #1 
On Sun, 1 May 2022 at 06:51, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Changes for v4:
>   * Rebase on master, where the first third is upstream.
>   * Split changes to add_cpreg_to_hashtable into bite sized chunks.
>   * Add ARM_CP_EL3_NO_EL2_{UNDEF,KEEP} flags.
>   * Fix access check for SCXTNUM_ELx (damien).

I'm going to apply patches 1-19, 23, 33 to target-arm.next
(making the minor fixups I noted in review comments for
patches 10 and 19).

I do still plan to review 21,22,34,41.

thanks
-- PMM