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[v2,00/24] target/arm: 8 new features, A76 and N1

Message ID 20220412003326.588530-1-richard.henderson@linaro.org
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Series target/arm: 8 new features, A76 and N1 | expand

Message

Richard Henderson April 12, 2022, 12:33 a.m. UTC 
For v2, combine two previous patch sets and address comments.

Patches lacking review:
  03-target-arm-Move-cortex-impdef-sysregs-to-cpu_tcg..patch
  04-target-arm-Update-qemu-system-arm-cpu-max-to-cort.patch
  06-target-arm-Split-out-arm32_max_features.patch
  12-target-arm-Add-minimal-RAS-registers.patch
  14-target-arm-Implement-virtual-SError-exceptions.patch
  20-target-arm-Enable-FEAT_CSV2_2-for-cpu-max.patch
  23-target-arm-Define-cortex-a76.patch
  24-target-arm-Define-neoverse-n1.patch


r~


Richard Henderson (24):
  target/arm: Add isar predicates for FEAT_Debugv8p2
  target/arm: Adjust definition of CONTEXTIDR_EL2
  target/arm: Move cortex impdef sysregs to cpu_tcg.c
  target/arm: Update qemu-system-arm -cpu max to cortex-a57
  target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max
  target/arm: Split out arm32_max_features
  target/arm: Annotate arm_max_initfn with FEAT identifiers
  target/arm: Use field names for manipulating EL2 and EL3 modes
  target/arm: Enable FEAT_Debugv8p2 for -cpu max
  target/arm: Enable FEAT_Debugv8p4 for -cpu max
  target/arm: Add isar_feature_{aa64,any}_ras
  target/arm: Add minimal RAS registers
  target/arm: Enable SCR and HCR bits for RAS
  target/arm: Implement virtual SError exceptions
  target/arm: Implement ESB instruction
  target/arm: Enable FEAT_RAS for -cpu max
  target/arm: Enable FEAT_IESB for -cpu max
  target/arm: Enable FEAT_CSV2 for -cpu max
  target/arm: Update ISAR fields for ARMv8.8
  target/arm: Enable FEAT_CSV2_2 for -cpu max
  target/arm: Enable FEAT_CSV3 for -cpu max
  target/arm: Enable FEAT_DGH for -cpu max
  target/arm: Define cortex-a76
  target/arm: Define neoverse-n1

 docs/system/arm/emulation.rst |  10 +
 docs/system/arm/virt.rst      |   2 +
 target/arm/cpu.h              |  72 +++++++
 target/arm/helper.h           |   1 +
 target/arm/internals.h        |  16 ++
 target/arm/syndrome.h         |   5 +
 target/arm/a32.decode         |  16 +-
 target/arm/t32.decode         |  18 +-
 hw/arm/sbsa-ref.c             |   2 +
 hw/arm/virt.c                 |   2 +
 target/arm/cpu.c              |  61 +++++-
 target/arm/cpu64.c            | 349 +++++++++++++++++++---------------
 target/arm/cpu_tcg.c          | 228 ++++++++++++++++------
 target/arm/helper.c           | 246 +++++++++++++++++++++++-
 target/arm/op_helper.c        |  43 +++++
 target/arm/translate-a64.c    |  18 ++
 target/arm/translate.c        |  23 +++
 17 files changed, 866 insertions(+), 246 deletions(-)