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[for-7.1,v6,00/51] target/nios2: Shadow register set, EIC and VIC

Message ID 20220317050538.924111-1-richard.henderson@linaro.org
Headers show
Series target/nios2: Shadow register set, EIC and VIC | expand

Message

Richard Henderson March 17, 2022, 5:04 a.m. UTC 
This has grown quite beyond merely implementing $SUBJECT,
which are only the last 8 patches of the set.

Version 6 fixes a tcg problem with indirect global lowering,
and adds a test harness and regression test.

Version 5 addresses all of the feedback from v4, fixes some
further bugs in the base exception handling, implements
some missing exceptions.


r~


Amir Gonnen (5):
  target/nios2: Check supervisor on eret
  target/nios2: Add NUM_GP_REGS and NUM_CP_REGS
  target/nios2: Split out helper for eret instruction
  hw/intc: Vectored Interrupt Controller (VIC)
  hw/nios2: Machine with a Vectored Interrupt Controller

Richard Henderson (46):
  tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH
  target/nios2: Stop generating code if gen_check_supervisor fails
  target/nios2: Split PC out of env->regs[]
  target/nios2: Fix BRET instruction
  target/nios2: Do not create TCGv for control registers
  linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs
  target/nios2: Remove cpu_interrupts_enabled
  target/nios2: Split control registers away from general registers
  target/nios2: Clean up nios2_cpu_dump_state
  target/nios2: Use hw/registerfields.h for CR_STATUS fields
  target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields
  target/nios2: Use hw/registerfields.h for CR_TLBADDR fields
  target/nios2: Use hw/registerfields.h for CR_TLBACC fields
  target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WE
  target/nios2: Use hw/registerfields.h for CR_TLBMISC fields
  target/nios2: Move R_FOO and CR_BAR into enumerations
  target/nios2: Create EXCP_SEMIHOST for semi-hosting
  target/nios2: Clean up nios2_cpu_do_interrupt
  target/nios2: Hoist CPU_LOG_INT logging
  target/nios2: Handle EXCP_UNALIGN and EXCP_UALIGND
  target/nios2: Cleanup set of CR_EXCEPTION for do_interrupt
  target/nios2: Clean up handling of tlbmisc in do_exception
  target/nios2: Prevent writes to read-only or reserved control fields
  target/nios2: Implement cpuid
  target/nios2: Implement CR_STATUS.RSIE
  target/nios2: Remove CPU_INTERRUPT_NMI
  target/nios2: Support division error exception
  target/nios2: Use tcg_constant_tl
  target/nios2: Introduce dest_gpr
  target/nios2: Drop CR_STATUS_EH from tb->flags
  target/nios2: Enable unaligned traps for system mode
  target/nios2: Create gen_jumpr
  target/nios2: Hoist set of is_jmp into gen_goto_tb
  target/nios2: Use gen_goto_tb for DISAS_TOO_MANY
  target/nios2: Use tcg_gen_lookup_and_goto_ptr
  target/nios2: Implement Misaligned destination exception
  linux-user/nios2: Handle various SIGILL exceptions
  target/nios2: Introduce shadow register sets
  target/nios2: Implement rdprs, wrprs
  target/nios2: Update helper_eret for shadow registers
  target/nios2: Implement EIC interrupt processing
  hw/nios2: Introduce Nios2MachineState
  hw/nios2: Move memory regions into Nios2Machine
  tests/tcg: Expose AR to test build environment if needed
  test/tcg/nios2: Add semihosting multiarch tests
  tests/tcg/nios2: Add test-shadow-1

 include/hw/intc/nios2_vic.h             |  64 +++
 include/tcg/tcg.h                       |   2 +
 target/nios2/cpu.h                      | 239 +++++++----
 target/nios2/helper.h                   |   5 +
 tests/tcg/nios2/semicall.h              |  25 ++
 hw/intc/nios2_vic.c                     | 313 ++++++++++++++
 hw/nios2/10m50_devboard.c               | 115 ++++--
 linux-user/elfload.c                    |   3 +-
 linux-user/nios2/cpu_loop.c             |  57 ++-
 linux-user/nios2/signal.c               |   6 +-
 target/nios2/cpu.c                      | 209 ++++++++--
 target/nios2/helper.c                   | 358 +++++++++-------
 target/nios2/mmu.c                      |  78 ++--
 target/nios2/op_helper.c                |  67 +++
 target/nios2/translate.c                | 519 +++++++++++++++---------
 tcg/tcg.c                               |  10 +
 configs/targets/nios2-softmmu.mak       |   1 +
 hw/intc/Kconfig                         |   3 +
 hw/intc/meson.build                     |   1 +
 hw/nios2/Kconfig                        |   1 +
 tests/tcg/Makefile.qemu                 |   7 +
 tests/tcg/configure.sh                  |  14 +
 tests/tcg/nios2/10m50-ghrd.ld           |  59 +++
 tests/tcg/nios2/Makefile.softmmu-target |  33 ++
 tests/tcg/nios2/ml-ftm.S                |  20 +
 tests/tcg/nios2/ml-intr.S               |  21 +
 tests/tcg/nios2/ml-memcpy.S             |  68 ++++
 tests/tcg/nios2/ml-memset.S             |  88 ++++
 tests/tcg/nios2/ml-outc.S               |  31 ++
 tests/tcg/nios2/ml-start.S              |  46 +++
 tests/tcg/nios2/test-shadow-1.S         |  37 ++
 31 files changed, 1934 insertions(+), 566 deletions(-)
 create mode 100644 include/hw/intc/nios2_vic.h
 create mode 100644 tests/tcg/nios2/semicall.h
 create mode 100644 hw/intc/nios2_vic.c
 create mode 100644 tests/tcg/nios2/10m50-ghrd.ld
 create mode 100644 tests/tcg/nios2/Makefile.softmmu-target
 create mode 100644 tests/tcg/nios2/ml-ftm.S
 create mode 100644 tests/tcg/nios2/ml-intr.S
 create mode 100644 tests/tcg/nios2/ml-memcpy.S
 create mode 100644 tests/tcg/nios2/ml-memset.S
 create mode 100644 tests/tcg/nios2/ml-outc.S
 create mode 100644 tests/tcg/nios2/ml-start.S
 create mode 100644 tests/tcg/nios2/test-shadow-1.S

Comments

Amir Gonnen March 22, 2022, 12:17 p.m. UTC | #1 
I tested this with Intel tooling (Quartus Prime EDS) to build the nios2 firmware.
Shadow register set, EIC, VIC work as expected.

Looking forward to seeing this merged!

Thanks,
Amir