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[PULL,00/15] tcg patch queue

Message ID 20211013182239.991127-1-richard.henderson@linaro.org
Headers show
Series tcg patch queue | expand

Message

Richard Henderson Oct. 13, 2021, 6:22 p.m. UTC
The following changes since commit ee26ce674a93c824713542cec3b6a9ca85459165:

  Merge remote-tracking branch 'remotes/jsnow/tags/python-pull-request' into staging (2021-10-12 16:08:33 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211013

for you to fetch changes up to 76e366e728549b3324cc2dee6745d6a4f1af18e6:

  tcg: Canonicalize alignment flags in MemOp (2021-10-13 09:14:35 -0700)

----------------------------------------------------------------
Use MO_128 for 16-byte atomic memory operations.
Add cpu_ld/st_mmu memory primitives.
Move helper_ld/st memory helpers out of tcg.h.
Canonicalize alignment flags in MemOp.

----------------------------------------------------------------
BALATON Zoltan (1):
      memory: Log access direction for invalid accesses

Richard Henderson (14):
      target/arm: Use MO_128 for 16 byte atomics
      target/i386: Use MO_128 for 16 byte atomics
      target/ppc: Use MO_128 for 16 byte atomics
      target/s390x: Use MO_128 for 16 byte atomics
      target/hexagon: Implement cpu_mmu_index
      accel/tcg: Add cpu_{ld,st}*_mmu interfaces
      accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h
      target/mips: Use cpu_*_data_ra for msa load/store
      target/mips: Use 8-byte memory ops for msa load/store
      target/s390x: Use cpu_*_mmu instead of helper_*_mmu
      target/sparc: Use cpu_*_mmu instead of helper_*_mmu
      target/arm: Use cpu_*_mmu instead of helper_*_mmu
      tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h
      tcg: Canonicalize alignment flags in MemOp

 docs/devel/loads-stores.rst   |  52 +++++-
 include/exec/cpu_ldst.h       | 332 ++++++++++++++++++-----------------
 include/tcg/tcg-ldst.h        |  74 ++++++++
 include/tcg/tcg.h             | 158 -----------------
 target/hexagon/cpu.h          |   9 +
 accel/tcg/cputlb.c            | 393 ++++++++++++++----------------------------
 accel/tcg/user-exec.c         | 385 +++++++++++++++++------------------------
 softmmu/memory.c              |  20 +--
 target/arm/helper-a64.c       |  61 ++-----
 target/arm/m_helper.c         |   6 +-
 target/i386/tcg/mem_helper.c  |   2 +-
 target/m68k/op_helper.c       |   1 -
 target/mips/tcg/msa_helper.c  | 389 ++++++++++-------------------------------
 target/ppc/mem_helper.c       |   1 -
 target/ppc/translate.c        |  12 +-
 target/s390x/tcg/mem_helper.c |  13 +-
 target/sparc/ldst_helper.c    |  14 +-
 tcg/tcg-op.c                  |   7 +-
 tcg/tcg.c                     |   1 +
 tcg/tci.c                     |   1 +
 accel/tcg/ldst_common.c.inc   | 307 +++++++++++++++++++++++++++++++++
 21 files changed, 1032 insertions(+), 1206 deletions(-)
 create mode 100644 include/tcg/tcg-ldst.h
 create mode 100644 accel/tcg/ldst_common.c.inc

Comments

Richard Henderson Oct. 13, 2021, 7:55 p.m. UTC | #1
On 10/13/21 11:22 AM, Richard Henderson wrote:
> The following changes since commit ee26ce674a93c824713542cec3b6a9ca85459165:

> 

>    Merge remote-tracking branch 'remotes/jsnow/tags/python-pull-request' into staging (2021-10-12 16:08:33 -0700)

> 

> are available in the Git repository at:

> 

>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211013

> 

> for you to fetch changes up to 76e366e728549b3324cc2dee6745d6a4f1af18e6:

> 

>    tcg: Canonicalize alignment flags in MemOp (2021-10-13 09:14:35 -0700)

> 

> ----------------------------------------------------------------

> Use MO_128 for 16-byte atomic memory operations.

> Add cpu_ld/st_mmu memory primitives.

> Move helper_ld/st memory helpers out of tcg.h.

> Canonicalize alignment flags in MemOp.

> 

> ----------------------------------------------------------------

> BALATON Zoltan (1):

>        memory: Log access direction for invalid accesses

> 

> Richard Henderson (14):

>        target/arm: Use MO_128 for 16 byte atomics

>        target/i386: Use MO_128 for 16 byte atomics

>        target/ppc: Use MO_128 for 16 byte atomics

>        target/s390x: Use MO_128 for 16 byte atomics

>        target/hexagon: Implement cpu_mmu_index

>        accel/tcg: Add cpu_{ld,st}*_mmu interfaces

>        accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h

>        target/mips: Use cpu_*_data_ra for msa load/store

>        target/mips: Use 8-byte memory ops for msa load/store

>        target/s390x: Use cpu_*_mmu instead of helper_*_mmu

>        target/sparc: Use cpu_*_mmu instead of helper_*_mmu

>        target/arm: Use cpu_*_mmu instead of helper_*_mmu

>        tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h

>        tcg: Canonicalize alignment flags in MemOp

> 

>   docs/devel/loads-stores.rst   |  52 +++++-

>   include/exec/cpu_ldst.h       | 332 ++++++++++++++++++-----------------

>   include/tcg/tcg-ldst.h        |  74 ++++++++

>   include/tcg/tcg.h             | 158 -----------------

>   target/hexagon/cpu.h          |   9 +

>   accel/tcg/cputlb.c            | 393 ++++++++++++++----------------------------

>   accel/tcg/user-exec.c         | 385 +++++++++++++++++------------------------

>   softmmu/memory.c              |  20 +--

>   target/arm/helper-a64.c       |  61 ++-----

>   target/arm/m_helper.c         |   6 +-

>   target/i386/tcg/mem_helper.c  |   2 +-

>   target/m68k/op_helper.c       |   1 -

>   target/mips/tcg/msa_helper.c  | 389 ++++++++++-------------------------------

>   target/ppc/mem_helper.c       |   1 -

>   target/ppc/translate.c        |  12 +-

>   target/s390x/tcg/mem_helper.c |  13 +-

>   target/sparc/ldst_helper.c    |  14 +-

>   tcg/tcg-op.c                  |   7 +-

>   tcg/tcg.c                     |   1 +

>   tcg/tci.c                     |   1 +

>   accel/tcg/ldst_common.c.inc   | 307 +++++++++++++++++++++++++++++++++

>   21 files changed, 1032 insertions(+), 1206 deletions(-)

>   create mode 100644 include/tcg/tcg-ldst.h

>   create mode 100644 accel/tcg/ldst_common.c.inc


Applied, thanks.

r~