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[PULL,00/10] tcg patch queue, v2

Message ID 20210921022534.365291-1-richard.henderson@linaro.org
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Series tcg patch queue, v2 | expand

Message

Richard Henderson Sept. 21, 2021, 2:25 a.m. UTC 
Drop has_work patches.
Add a few more misc cleanups.


The following changes since commit 326ff8dd09556fc2e257196c49f35009700794ac:

  Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging (2021-09-20 16:17:05 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210920

for you to fetch changes up to b21ba5dfe3f4a367910d490d10fa7c9fa76f1504:

  tcg/riscv: Remove add with zero on user-only memory access (2021-09-20 14:17:54 -0700)

----------------------------------------------------------------
Move cpu_signal_handler declaration.
Restrict cpu_handle_halt to sysemu.
Make do_unaligned_access noreturn.
Misc tcg/mips cleanup
Misc tcg/sparc cleanup
Misc tcg/riscv cleanup

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      accel/tcg: Restrict cpu_handle_halt() to sysemu

Richard Henderson (9):
      include/exec: Move cpu_signal_handler declaration
      tcg/mips: Drop inline markers
      tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr
      tcg/mips: Unset TCG_TARGET_HAS_direct_jump
      tcg/mips: Drop special alignment for code_gen_buffer
      tcg/sparc: Drop inline markers
      tcg/sparc: Introduce tcg_out_mov_delay
      hw/core: Make do_unaligned_access noreturn
      tcg/riscv: Remove add with zero on user-only memory access

 include/exec/exec-all.h        |  13 +++++
 include/hw/core/tcg-cpu-ops.h  |   3 +-
 target/alpha/cpu.h             |  10 +---
 target/arm/cpu.h               |   7 ---
 target/arm/internals.h         |   2 +-
 target/avr/cpu.h               |   2 -
 target/cris/cpu.h              |   8 ----
 target/hexagon/cpu.h           |   3 --
 target/hppa/cpu.h              |   3 --
 target/i386/cpu.h              |   7 ---
 target/m68k/cpu.h              |   8 ----
 target/microblaze/cpu.h        |   9 +---
 target/mips/cpu.h              |   3 --
 target/mips/internal.h         |   2 -
 target/mips/tcg/tcg-internal.h |   4 +-
 target/nios2/cpu.h             |   6 +--
 target/openrisc/cpu.h          |   2 -
 target/ppc/cpu.h               |   7 ---
 target/ppc/internal.h          |   4 +-
 target/riscv/cpu.h             |   4 +-
 target/rx/cpu.h                |   4 --
 target/s390x/cpu.h             |   7 ---
 target/s390x/s390x-internal.h  |   4 +-
 target/sh4/cpu.h               |   7 +--
 target/sparc/cpu.h             |   2 -
 target/tricore/cpu.h           |   2 -
 target/xtensa/cpu.h            |   6 +--
 tcg/mips/tcg-target.h          |  12 ++---
 accel/tcg/cpu-exec.c           |   6 ++-
 target/hppa/cpu.c              |   7 +--
 tcg/region.c                   |  91 -----------------------------------
 tcg/mips/tcg-target.c.inc      | 105 ++++++++++++++---------------------------
 tcg/riscv/tcg-target.c.inc     |  10 +---
 tcg/sparc/tcg-target.c.inc     |  64 ++++++++++++++-----------
 34 files changed, 119 insertions(+), 315 deletions(-)