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smtp.gmail.com with ESMTPSA id j2sm18811253pfb.53.2021.06.29.11.54.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Jun 2021 11:54:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/63] tcg patch queue Date: Tue, 29 Jun 2021 11:53:52 -0700 Message-Id: <20210629185455.3131172-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The following changes since commit 13d5f87cc3b94bfccc501142df4a7b12fee3a6e7: Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-axp-20210628' into staging (2021-06-29 10:02:42 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210629 for you to fetch changes up to c86bd2dc4c1d37653c27293b2dacee6bb46bb995: tcg/riscv: Remove MO_BSWAP handling (2021-06-29 10:04:57 -0700) ---------------------------------------------------------------- TranslatorOps conversion for target/avr TranslatorOps conversion for target/cris TranslatorOps conversion for target/nios2 Simple vector operations on TCGv_i32 Host signal fixes for *BSD Improvements to tcg bswap operations ---------------------------------------------------------------- LIU Zhiwei (5): tcg: Add tcg_gen_vec_add{sub}16_i32 tcg: Add tcg_gen_vec_add{sub}8_i32 tcg: Add tcg_gen_vec_shl{shr}{sar}16i_i32 tcg: Add tcg_gen_vec_shl{shr}{sar}8i_i32 tcg: Implement tcg_gen_vec_add{sub}32_tl Richard Henderson (57): target/nios2: Replace DISAS_TB_JUMP with DISAS_NORETURN target/nios2: Use global cpu_env target/nios2: Use global cpu_R target/nios2: Add DisasContextBase to DisasContext target/nios2: Convert to TranslatorOps target/nios2: Remove assignment to env in handle_instruction target/nios2: Clean up goto in handle_instruction target/nios2: Inline handle_instruction target/nios2: Use pc_next for pc + 4 target/avr: Add DisasContextBase to DisasContext target/avr: Change ctx to DisasContext* in gen_intermediate_code target/avr: Convert to TranslatorOps target/cris: Add DisasContextBase to DisasContext target/cris: Remove DISAS_SWI target/cris: Replace DISAS_TB_JUMP with DISAS_NORETURN target/cris: Mark exceptions as DISAS_NORETURN target/cris: Fix use_goto_tb target/cris: Convert to TranslatorOps target/cris: Mark helper_raise_exception noreturn target/cris: Mark static arrays const target/cris: Fold unhandled X_FLAG changes into cpustate_changed target/cris: Set cpustate_changed for rfe/rfn target/cris: Add DISAS_UPDATE_NEXT target/cris: Add DISAS_DBRANCH target/cris: Use tcg_gen_lookup_and_goto_ptr target/cris: Improve JMP_INDIRECT target/cris: Remove dc->flagx_known target/cris: Do not exit tb for X_FLAG changes tcg: Add flags argument to bswap opcodes tcg/i386: Support bswap flags tcg/aarch64: Merge tcg_out_rev{16,32,64} tcg/aarch64: Support bswap flags tcg/arm: Support bswap flags tcg/ppc: Split out tcg_out_ext{8,16,32}s tcg/ppc: Split out tcg_out_sari{32,64} tcg/ppc: Split out tcg_out_bswap16 tcg/ppc: Split out tcg_out_bswap32 tcg/ppc: Split out tcg_out_bswap64 tcg/ppc: Support bswap flags tcg/ppc: Use power10 byte-reverse instructions tcg/s390: Support bswap flags tcg/mips: Support bswap flags in tcg_out_bswap16 tcg/mips: Support bswap flags in tcg_out_bswap32 tcg/tci: Support bswap flags tcg: Handle new bswap flags during optimize tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64 tcg: Make use of bswap flags in tcg_gen_qemu_ld_* tcg: Make use of bswap flags in tcg_gen_qemu_st_* target/arm: Improve REV32 target/arm: Improve vector REV target/arm: Improve REVSH target/i386: Improve bswap translation target/sh4: Improve swap.b translation target/mips: Fix gen_mxu_s32ldd_s32lddr tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAP tcg/aarch64: Unset TCG_TARGET_HAS_MEMORY_BSWAP tcg/riscv: Remove MO_BSWAP handling Warner Losh (1): tcg: Use correct trap number for page faults on *BSD systems include/tcg/tcg-op-gvec.h | 43 ++++ include/tcg/tcg-op.h | 8 +- include/tcg/tcg-opc.h | 10 +- include/tcg/tcg.h | 12 + target/cris/helper.h | 2 +- tcg/aarch64/tcg-target.h | 2 +- tcg/arm/tcg-target.h | 2 +- accel/tcg/user-exec.c | 20 +- target/arm/translate-a64.c | 21 +- target/arm/translate.c | 4 +- target/avr/translate.c | 284 ++++++++++++---------- target/cris/translate.c | 515 ++++++++++++++++++++-------------------- target/i386/tcg/translate.c | 14 +- target/mips/tcg/mxu_translate.c | 6 +- target/nios2/translate.c | 318 ++++++++++++------------- target/s390x/translate.c | 4 +- target/sh4/translate.c | 3 +- tcg/optimize.c | 56 ++++- tcg/tcg-op-gvec.c | 122 ++++++++++ tcg/tcg-op.c | 143 +++++++---- tcg/tcg.c | 28 +++ tcg/tci.c | 3 +- target/cris/translate_v10.c.inc | 17 +- tcg/aarch64/tcg-target.c.inc | 125 ++++------ tcg/arm/tcg-target.c.inc | 295 ++++++++++------------- tcg/i386/tcg-target.c.inc | 20 +- tcg/mips/tcg-target.c.inc | 102 ++++---- tcg/ppc/tcg-target.c.inc | 230 ++++++++++++------ tcg/riscv/tcg-target.c.inc | 64 ++--- tcg/s390/tcg-target.c.inc | 34 ++- tcg/tci/tcg-target.c.inc | 23 +- tcg/README | 22 +- 32 files changed, 1458 insertions(+), 1094 deletions(-)