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[PULL,00/31] tcg patch queue

Message ID 20210526234710.125396-1-richard.henderson@linaro.org
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Series tcg patch queue | expand

Message

Richard Henderson May 26, 2021, 11:46 p.m. UTC 
The following changes since commit 0319ad22bd5789e1eaa8a2dd5773db2d2c372f20:

  Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-misc-updates-250521-2' into staging (2021-05-25 17:31:04 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210526

for you to fetch changes up to 119065574d02deffc28fe5b6a864db9b467c6ffd:

  hw/core: Constify TCGCPUOps (2021-05-26 15:33:59 -0700)

----------------------------------------------------------------
Adjust types for some memory access functions.
Reduce inclusion of tcg headers.
Fix watchpoints vs replay.
Fix tcg/aarch64 roli expansion.
Introduce SysemuCPUOps structure.

----------------------------------------------------------------
Pavel Dovgalyuk (1):
      replay: fix watchpoint processing for reverse debugging

Philippe Mathieu-Daudé (27):
      exec/memory_ldst_cached: Sort declarations
      exec/memory_ldst_phys: Sort declarations
      exec/memory_ldst: Use correct type sizes
      exec/memory_ldst_phys: Use correct type sizes
      exec/memory_ldst_cached: Use correct type size
      exec/memory: Use correct type size
      accel/tcg: Reduce 'exec/tb-context.h' inclusion
      accel/tcg: Keep TranslationBlock headers local to TCG
      cpu: Remove duplicated 'sysemu/hw_accel.h' header
      cpu: Split as cpu-common / cpu-sysemu
      cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs
      cpu: Introduce cpu_virtio_is_big_endian()
      cpu: Directly use cpu_write_elf*() fallback handlers in place
      cpu: Directly use get_paging_enabled() fallback handlers in place
      cpu: Directly use get_memory_mapping() fallback handlers in place
      cpu: Assert DeviceClass::vmsd is NULL on user emulation
      cpu: Rename CPUClass vmsd -> legacy_vmsd
      cpu: Move AVR target vmsd field from CPUClass to DeviceClass
      cpu: Introduce SysemuCPUOps structure
      cpu: Move CPUClass::vmsd to SysemuCPUOps
      cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps
      cpu: Move CPUClass::get_crash_info to SysemuCPUOps
      cpu: Move CPUClass::write_elf* to SysemuCPUOps
      cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps
      cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps
      cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps
      cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps

Richard Henderson (2):
      target/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed
      hw/core: Constify TCGCPUOps

Yasuo Kuwahara (1):
      tcg/aarch64: Fix tcg_out_rotl

 {include/exec => accel/tcg}/tb-context.h |   0
 {include/exec => accel/tcg}/tb-hash.h    |   0
 {include/exec => accel/tcg}/tb-lookup.h  |   2 +-
 include/exec/exec-all.h                  |   1 -
 include/exec/memory.h                    |   2 +-
 include/hw/core/cpu.h                    |  94 +++++---------------
 include/hw/core/sysemu-cpu-ops.h         |  92 ++++++++++++++++++++
 include/migration/vmstate.h              |   2 -
 include/tcg/tcg.h                        |   1 -
 plugins/plugin.h                         |   1 +
 target/mips/cpu-qom.h                    |   3 +
 include/exec/memory_ldst.h.inc           |  16 ++--
 include/exec/memory_ldst_cached.h.inc    |  46 +++++-----
 include/exec/memory_ldst_phys.h.inc      |  72 +++++++--------
 accel/tcg/cpu-exec.c                     |   5 +-
 accel/tcg/cputlb.c                       |   2 +-
 accel/tcg/tcg-runtime.c                  |   2 +-
 accel/tcg/translate-all.c                |   3 +-
 cpu.c                                    |  18 ++--
 hw/core/{cpu.c => cpu-common.c}          | 116 -------------------------
 hw/core/cpu-sysemu.c                     | 145 +++++++++++++++++++++++++++++++
 hw/mips/jazz.c                           |  35 +-------
 hw/virtio/virtio.c                       |   4 +-
 softmmu/physmem.c                        |  10 +++
 stubs/vmstate.c                          |   2 -
 target/alpha/cpu.c                       |  12 ++-
 target/arm/cpu.c                         |  22 +++--
 target/arm/cpu_tcg.c                     |   2 +-
 target/avr/cpu.c                         |  12 ++-
 target/avr/machine.c                     |   4 +-
 target/cris/cpu.c                        |  14 ++-
 target/hexagon/cpu.c                     |   2 +-
 target/hppa/cpu.c                        |  12 ++-
 target/i386/cpu.c                        |  30 ++++---
 target/i386/tcg/tcg-cpu.c                |   2 +-
 target/m68k/cpu.c                        |  12 ++-
 target/microblaze/cpu.c                  |  12 ++-
 target/mips/cpu.c                        |  14 ++-
 target/mips/tcg/op_helper.c              |   3 +-
 target/nios2/cpu.c                       |  12 ++-
 target/openrisc/cpu.c                    |  12 ++-
 target/ppc/cpu_init.c                    |  24 ++---
 target/riscv/cpu.c                       |  19 ++--
 target/rx/cpu.c                          |  14 ++-
 target/s390x/cpu.c                       |  18 ++--
 target/sh4/cpu.c                         |  15 +++-
 target/sparc/cpu.c                       |  14 ++-
 target/tricore/cpu.c                     |  10 ++-
 target/xtensa/cpu.c                      |  14 ++-
 memory_ldst.c.inc                        |  20 ++---
 tcg/aarch64/tcg-target.c.inc             |   5 +-
 MAINTAINERS                              |   1 -
 hw/core/meson.build                      |   3 +-
 53 files changed, 602 insertions(+), 406 deletions(-)
 rename {include/exec => accel/tcg}/tb-context.h (100%)
 rename {include/exec => accel/tcg}/tb-hash.h (100%)
 rename {include/exec => accel/tcg}/tb-lookup.h (98%)
 create mode 100644 include/hw/core/sysemu-cpu-ops.h
 rename hw/core/{cpu.c => cpu-common.c} (73%)
 create mode 100644 hw/core/cpu-sysemu.c

Comments

Peter Maydell May 28, 2021, 6:25 p.m. UTC | #1 
On Thu, 27 May 2021 at 00:47, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> The following changes since commit 0319ad22bd5789e1eaa8a2dd5773db2d2c372f20:

>

>   Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-misc-updates-250521-2' into staging (2021-05-25 17:31:04 +0100)

>

> are available in the Git repository at:

>

>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210526

>

> for you to fetch changes up to 119065574d02deffc28fe5b6a864db9b467c6ffd:

>

>   hw/core: Constify TCGCPUOps (2021-05-26 15:33:59 -0700)

>

> ----------------------------------------------------------------

> Adjust types for some memory access functions.

> Reduce inclusion of tcg headers.

> Fix watchpoints vs replay.

> Fix tcg/aarch64 roli expansion.

> Introduce SysemuCPUOps structure.



Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.

-- PMM