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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id v6sm6516265pfi.31.2021.01.07.12.14.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 12:14:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/47] tcg patch queue Date: Thu, 7 Jan 2021 10:14:01 -1000 Message-Id: <20210107201448.1152301-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The following changes since commit 470dd6bd360782f5137f7e3376af6a44658eb1d3: Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-060121-4' into staging (2021-01-06 22:18:36 +0000) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210107 for you to fetch changes up to e5e2e4c73926f6f3c1f5da24a350e4345d5ad232: tcg: Constify TCGLabelQemuLdst.raddr (2021-01-07 05:09:42 -1000) ---------------------------------------------------------------- Build fix for ppc64 centos7. Reduce the use of scratch registers for tcg/i386. Use _aligned_malloc for Win32. Enable split w^x code gen buffers. ---------------------------------------------------------------- Philippe Mathieu-Daudé (1): util/oslib: Assert qemu_try_memalign() alignment is a power of 2 Richard Henderson (46): linux-user: Conditionalize TUNSETVNETLE tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP tcg: Introduce INDEX_op_qemu_st8_i32 util/oslib-win32: Use _aligned_malloc for qemu_try_memalign tcg: Do not flush icache for interpreter util: Enhance flush_icache_range with separate data pointer util: Specialize flush_idcache_range for aarch64 tcg: Move tcg prologue pointer out of TCGContext tcg: Move tcg epilogue pointer out of TCGContext tcg: Add in_code_gen_buffer tcg: Introduce tcg_splitwx_to_{rx,rw} tcg: Adjust TCGLabel for const tcg: Adjust tcg_out_call for const tcg: Adjust tcg_out_label for const tcg: Adjust tcg_register_jit for const tcg: Adjust tb_target_set_jmp_target for split-wx tcg: Make DisasContextBase.tb const tcg: Make tb arg to synchronize_from_tb const tcg: Use Error with alloc_code_gen_buffer tcg: Add --accel tcg,split-wx property accel/tcg: Support split-wx for linux with memfd accel/tcg: Support split-wx for darwin/iOS with vm_remap tcg: Return the TB pointer from the rx region from exit_tb tcg/i386: Support split-wx code generation tcg/aarch64: Use B not BL for tcg_out_goto_long tcg/aarch64: Support split-wx code generation disas: Push const down through host disassembly tcg/tci: Push const down through bytecode reading tcg: Introduce tcg_tbrel_diff tcg/ppc: Use tcg_tbrel_diff tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB tcg/ppc: Support split-wx code generation tcg/sparc: Use tcg_tbrel_diff tcg/sparc: Support split-wx code generation tcg/s390: Use tcg_tbrel_diff tcg/s390: Support split-wx code generation tcg/riscv: Fix branch range checks tcg/riscv: Remove branch-over-branch fallback tcg/riscv: Support split-wx code generation accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd tcg/mips: Do not assert on relocation overflow tcg/mips: Support split-wx code generation tcg/arm: Support split-wx code generation tcg: Remove TCG_TARGET_SUPPORT_MIRROR tcg: Constify tcg_code_gen_epilogue tcg: Constify TCGLabelQemuLdst.raddr accel/tcg/tcg-runtime.h | 2 +- include/disas/dis-asm.h | 4 +- include/disas/disas.h | 2 +- include/exec/exec-all.h | 2 +- include/exec/gen-icount.h | 4 +- include/exec/log.h | 2 +- include/exec/translator.h | 2 +- include/hw/core/cpu.h | 3 +- include/qemu/cacheflush.h | 15 ++- include/sysemu/tcg.h | 3 +- include/tcg/tcg-op.h | 2 +- include/tcg/tcg-opc.h | 5 + include/tcg/tcg.h | 61 +++++++-- linux-user/ioctls.h | 2 + tcg/aarch64/tcg-target.h | 3 +- tcg/arm/tcg-target.h | 3 +- tcg/i386/tcg-target.h | 12 +- tcg/mips/tcg-target.h | 3 +- tcg/ppc/tcg-target.h | 3 +- tcg/riscv/tcg-target.h | 3 +- tcg/s390/tcg-target.h | 9 +- tcg/sparc/tcg-target.h | 3 +- tcg/tci/tcg-target.h | 7 +- accel/tcg/cpu-exec.c | 41 +++--- accel/tcg/tcg-all.c | 26 +++- accel/tcg/tcg-runtime.c | 4 +- accel/tcg/translate-all.c | 311 ++++++++++++++++++++++++++++++++++--------- accel/tcg/translator.c | 4 +- bsd-user/main.c | 2 +- disas.c | 2 +- disas/capstone.c | 2 +- linux-user/main.c | 2 +- softmmu/physmem.c | 2 +- target/arm/cpu.c | 3 +- target/arm/translate-a64.c | 2 +- target/avr/cpu.c | 3 +- target/hppa/cpu.c | 3 +- target/i386/tcg/tcg-cpu.c | 3 +- target/microblaze/cpu.c | 3 +- target/mips/cpu.c | 3 +- target/riscv/cpu.c | 3 +- target/rx/cpu.c | 3 +- target/sh4/cpu.c | 3 +- target/sparc/cpu.c | 3 +- target/tricore/cpu.c | 2 +- tcg/optimize.c | 1 + tcg/tcg-op.c | 21 ++- tcg/tcg.c | 94 ++++++++++--- tcg/tci.c | 62 +++++---- util/cacheflush.c | 107 ++++++++++++--- util/cacheinfo.c | 8 +- util/oslib-posix.c | 2 + util/oslib-win32.c | 12 +- tcg/aarch64/tcg-target.c.inc | 75 ++++++----- tcg/arm/tcg-target.c.inc | 41 +++--- tcg/i386/tcg-target.c.inc | 174 +++++++++++------------- tcg/mips/tcg-target.c.inc | 97 ++++++-------- tcg/ppc/tcg-target.c.inc | 88 ++++++------ tcg/riscv/tcg-target.c.inc | 125 ++++++----------- tcg/s390/tcg-target.c.inc | 91 ++++++------- tcg/sparc/tcg-target.c.inc | 58 ++++---- tcg/tcg-ldst.c.inc | 2 +- tcg/tcg-pool.c.inc | 6 +- tcg/tci/tcg-target.c.inc | 2 +- accel/tcg/trace-events | 2 +- qemu-options.hx | 7 + tcg/README | 5 + 67 files changed, 1035 insertions(+), 630 deletions(-)