| Message ID | 20201224224514.626561-1-richard.henderson@linaro.org |
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| Headers | show
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[174.21.150.71]) by smtp.gmail.com with ESMTPSA id w11sm11844123pge.28.2020.12.24.14.45.14 for <qemu-devel@nongnu.org> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Dec 2020 14:45:15 -0800 (PST) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PATCH 00/15] tcg/arm: host neon support Date: Thu, 24 Dec 2020 14:44:59 -0800 Message-Id: <20201224224514.626561-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
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tcg/arm: host neon support
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expand
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Based-on: 20201217145215.534637-1-richard.henderson@linaro.org ("tcg: Better handling of constants") Based-on: 20201223060204.576856-1-richard.henderson@linaro.org ("tcg: backend constraints cleanup") Generate NEON instructions for tcg vector operations. r~ Richard Henderson (15): tcg/arm: Add host vector framework tcg/arm: Implement tcg_out_ld/st for vector types tcg/arm: Implement tcg_out_mov for vector types tcg/arm: Implement tcg_out_dup*_vec tcg: Change parameters for tcg_target_const_match tcg/arm: Implement minimal vector operations tcg/arm: Implement andc, orc, abs, neg, not vector operations tcg/arm: Implement TCG_TARGET_HAS_shi_vec tcg/arm: Implement TCG_TARGET_HAS_mul_vec tcg/arm: Implement TCG_TARGET_HAS_sat_vec tcg/arm: Implement TCG_TARGET_HAS_minmax_vec tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec tcg/arm: Implement TCG_TARGET_HAS_shv_vec tcg/arm: Implement TCG_TARGET_HAS_roti_vec tcg/arm: Implement TCG_TARGET_HAS_rotv_vec tcg/arm/tcg-target-conset.h | 10 + tcg/arm/tcg-target-constr.h | 3 + tcg/arm/tcg-target.h | 52 +- tcg/arm/tcg-target.opc.h | 16 + tcg/tcg.c | 5 +- tcg/aarch64/tcg-target.c.inc | 5 +- tcg/arm/tcg-target.c.inc | 956 +++++++++++++++++++++++++++++++++-- tcg/i386/tcg-target.c.inc | 4 +- tcg/mips/tcg-target.c.inc | 5 +- tcg/ppc/tcg-target.c.inc | 4 +- tcg/riscv/tcg-target.c.inc | 4 +- tcg/s390/tcg-target.c.inc | 5 +- tcg/sparc/tcg-target.c.inc | 5 +- tcg/tci/tcg-target.c.inc | 6 +- 14 files changed, 1002 insertions(+), 78 deletions(-) create mode 100644 tcg/arm/tcg-target.opc.h -- 2.25.1