mbox series

[v3,00/41] Mirror map JIT memory for TCG

Message ID 20201106032921.600200-1-richard.henderson@linaro.org
Headers show
Series Mirror map JIT memory for TCG | expand

Message

Richard Henderson Nov. 6, 2020, 3:28 a.m. UTC
This is my take on Joelle's patch set:
https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg07837.html

Changes for v3:
  * Even more patches -- all tcg backends converted.
  * Fixups for darwin/ios merged (Joelle).
  * Feature renamed to splitwx (Paolo).


r~


Richard Henderson (41):
  tcg: Enhance flush_icache_range with separate data pointer
  tcg: Move tcg prologue pointer out of TCGContext
  tcg: Move tcg epilogue pointer out of TCGContext
  tcg: Add in_code_gen_buffer
  tcg: Introduce tcg_splitwx_to_{rx,rw}
  tcg: Adjust TCGLabel for const
  tcg: Adjust tcg_out_call for const
  tcg: Adjust tcg_out_label for const
  tcg: Adjust tcg_register_jit for const
  tcg: Adjust tb_target_set_jmp_target for split-wx
  tcg: Make DisasContextBase.tb const
  tcg: Make tb arg to synchronize_from_tb const
  tcg: Use Error with alloc_code_gen_buffer
  tcg: Add --accel tcg,split-wx property
  accel/tcg: Support split-wx for linux with memfd
  accel/tcg: Support split-wx for darwin/iOS with vm_remap
  tcg: Return the TB pointer from the rx region from exit_tb
  tcg/i386: Support split-wx code generation
  tcg/aarch64: Use B not BL for tcg_out_goto_long
  tcg/aarch64: Implement flush_idcache_range manually
  tcg/aarch64: Support split-wx code generation
  disas: Push const down through host disasassembly
  tcg/tci: Push const down through bytecode reading
  tcg: Introduce tcg_tbrel_diff
  tcg/ppc: Use tcg_tbrel_diff
  tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB
  tcg/ppc: Support split-wx code generation
  tcg/sparc: Use tcg_tbrel_diff
  tcg/sparc: Support split-wx code generation
  tcg/s390: Use tcg_tbrel_diff
  tcg/s390: Support split-wx code generation
  tcg/riscv: Fix branch range checks
  tcg/riscv: Remove branch-over-branch fallback
  tcg/riscv: Support split-wx code generation
  accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd
  tcg/mips: Do not assert on relocation overflow
  tcg/mips: Support split-wx code generation
  tcg/arm: Support split-wx code generation
  tcg: Remove TCG_TARGET_SUPPORT_MIRROR
  tcg: Constify tcg_code_gen_epilogue
  tcg: Constify TCGLabelQemuLdst.raddr

 accel/tcg/tcg-runtime.h      |   2 +-
 include/disas/dis-asm.h      |   4 +-
 include/disas/disas.h        |   2 +-
 include/exec/exec-all.h      |   2 +-
 include/exec/gen-icount.h    |   4 +-
 include/exec/log.h           |   2 +-
 include/exec/translator.h    |   2 +-
 include/hw/core/cpu.h        |   3 +-
 include/sysemu/tcg.h         |   3 +-
 include/tcg/tcg-op.h         |   2 +-
 include/tcg/tcg.h            |  56 +++++--
 tcg/aarch64/tcg-target.h     |   8 +-
 tcg/arm/tcg-target.h         |  10 +-
 tcg/i386/tcg-target.h        |   9 +-
 tcg/mips/tcg-target.h        |  10 +-
 tcg/ppc/tcg-target.h         |   4 +-
 tcg/riscv/tcg-target.h       |  10 +-
 tcg/s390/tcg-target.h        |  11 +-
 tcg/sparc/tcg-target.h       |  10 +-
 tcg/tci/tcg-target.h         |  11 +-
 accel/tcg/cpu-exec.c         |  41 +++--
 accel/tcg/tcg-all.c          |  26 ++-
 accel/tcg/tcg-runtime.c      |   4 +-
 accel/tcg/translate-all.c    | 307 +++++++++++++++++++++++++++--------
 accel/tcg/translator.c       |   4 +-
 bsd-user/main.c              |   2 +-
 disas.c                      |   2 +-
 disas/capstone.c             |   2 +-
 linux-user/main.c            |   2 +-
 softmmu/physmem.c            |   9 +-
 target/arm/cpu.c             |   3 +-
 target/arm/translate-a64.c   |   2 +-
 target/avr/cpu.c             |   3 +-
 target/hppa/cpu.c            |   3 +-
 target/i386/cpu.c            |   3 +-
 target/microblaze/cpu.c      |   3 +-
 target/mips/cpu.c            |   3 +-
 target/riscv/cpu.c           |   3 +-
 target/rx/cpu.c              |   3 +-
 target/sh4/cpu.c             |   3 +-
 target/sparc/cpu.c           |   3 +-
 target/tricore/cpu.c         |   2 +-
 tcg/tcg-op.c                 |  15 +-
 tcg/tcg.c                    |  86 ++++++++--
 tcg/tci.c                    |  60 ++++---
 accel/tcg/trace-events       |   2 +-
 tcg/aarch64/tcg-target.c.inc | 139 ++++++++++++----
 tcg/arm/tcg-target.c.inc     |  41 ++---
 tcg/i386/tcg-target.c.inc    |  36 ++--
 tcg/mips/tcg-target.c.inc    |  97 +++++------
 tcg/ppc/tcg-target.c.inc     | 105 ++++++------
 tcg/riscv/tcg-target.c.inc   | 125 +++++---------
 tcg/s390/tcg-target.c.inc    |  91 +++++------
 tcg/sparc/tcg-target.c.inc   |  58 +++----
 tcg/tcg-ldst.c.inc           |   2 +-
 tcg/tcg-pool.c.inc           |   6 +-
 tcg/tci/tcg-target.c.inc     |   2 +-
 57 files changed, 917 insertions(+), 546 deletions(-)

-- 
2.25.1

Comments

no-reply@patchew.org Nov. 6, 2020, 4 a.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20201106032921.600200-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20201106032921.600200-1-richard.henderson@linaro.org
Subject: [PATCH v3 00/41] Mirror map JIT memory for TCG

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20201106032921.600200-1-richard.henderson@linaro.org -> patchew/20201106032921.600200-1-richard.henderson@linaro.org
Switched to a new branch 'test'
170f310 tcg: Constify TCGLabelQemuLdst.raddr
c336494 tcg: Constify tcg_code_gen_epilogue
a009e99 tcg: Remove TCG_TARGET_SUPPORT_MIRROR
545feb7 tcg/arm: Support split-wx code generation
a873c61 tcg/mips: Support split-wx code generation
7f12d40 tcg/mips: Do not assert on relocation overflow
200ecb3 accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd
edd72db tcg/riscv: Support split-wx code generation
1c6764d tcg/riscv: Remove branch-over-branch fallback
63883fc tcg/riscv: Fix branch range checks
dff34e0 tcg/s390: Support split-wx code generation
8d88879 tcg/s390: Use tcg_tbrel_diff
f0fea63 tcg/sparc: Support split-wx code generation
5a837a3 tcg/sparc: Use tcg_tbrel_diff
684c281 tcg/ppc: Support split-wx code generation
a254bfd tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB
4c4f647 tcg/ppc: Use tcg_tbrel_diff
5f81f0e tcg: Introduce tcg_tbrel_diff
1cab418 tcg/tci: Push const down through bytecode reading
c55a8c0 disas: Push const down through host disasassembly
55b926c tcg/aarch64: Support split-wx code generation
aef71b4 tcg/aarch64: Implement flush_idcache_range manually
548fc79 tcg/aarch64: Use B not BL for tcg_out_goto_long
6cbd22a tcg/i386: Support split-wx code generation
fe36cad tcg: Return the TB pointer from the rx region from exit_tb
ef96a10 accel/tcg: Support split-wx for darwin/iOS with vm_remap
fed5e19 accel/tcg: Support split-wx for linux with memfd
caaf645 tcg: Add --accel tcg,split-wx property
f93ae22 tcg: Use Error with alloc_code_gen_buffer
b6992b5 tcg: Make tb arg to synchronize_from_tb const
043973b tcg: Make DisasContextBase.tb const
1d83486 tcg: Adjust tb_target_set_jmp_target for split-wx
eec18a6 tcg: Adjust tcg_register_jit for const
65e76b9 tcg: Adjust tcg_out_label for const
44975a9 tcg: Adjust tcg_out_call for const
c3e1e5d tcg: Adjust TCGLabel for const
72ac21e tcg: Introduce tcg_splitwx_to_{rx,rw}
3e322da tcg: Add in_code_gen_buffer
ccb0c48 tcg: Move tcg epilogue pointer out of TCGContext
09ef808 tcg: Move tcg prologue pointer out of TCGContext
e488e58 tcg: Enhance flush_icache_range with separate data pointer

=== OUTPUT BEGIN ===
1/41 Checking commit e488e58096f9 (tcg: Enhance flush_icache_range with separate data pointer)
2/41 Checking commit 09ef8082ce7f (tcg: Move tcg prologue pointer out of TCGContext)
3/41 Checking commit ccb0c482bf3e (tcg: Move tcg epilogue pointer out of TCGContext)
4/41 Checking commit 3e322da5de89 (tcg: Add in_code_gen_buffer)
5/41 Checking commit 72ac21e27103 (tcg: Introduce tcg_splitwx_to_{rx,rw})
6/41 Checking commit c3e1e5d3a470 (tcg: Adjust TCGLabel for const)
7/41 Checking commit 44975a9cbb02 (tcg: Adjust tcg_out_call for const)
8/41 Checking commit 65e76b95a029 (tcg: Adjust tcg_out_label for const)
9/41 Checking commit eec18a607903 (tcg: Adjust tcg_register_jit for const)
10/41 Checking commit 1d83486ee180 (tcg: Adjust tb_target_set_jmp_target for split-wx)
11/41 Checking commit 043973b272b1 (tcg: Make DisasContextBase.tb const)
12/41 Checking commit b6992b579570 (tcg: Make tb arg to synchronize_from_tb const)
13/41 Checking commit f93ae2267092 (tcg: Use Error with alloc_code_gen_buffer)
14/41 Checking commit caaf645ec574 (tcg: Add --accel tcg,split-wx property)
15/41 Checking commit fed5e19b3c0c (accel/tcg: Support split-wx for linux with memfd)
16/41 Checking commit ef96a10480c7 (accel/tcg: Support split-wx for darwin/iOS with vm_remap)
ERROR: externs should be avoided in .c files
#24: FILE: accel/tcg/translate-all.c:1172:
+extern kern_return_t mach_vm_remap(vm_map_t target_task,

total: 1 errors, 0 warnings, 80 lines checked

Patch 16/41 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/41 Checking commit fe36cad8bf7d (tcg: Return the TB pointer from the rx region from exit_tb)
18/41 Checking commit 6cbd22af41aa (tcg/i386: Support split-wx code generation)
19/41 Checking commit 548fc7975cc4 (tcg/aarch64: Use B not BL for tcg_out_goto_long)
20/41 Checking commit aef71b442d41 (tcg/aarch64: Implement flush_idcache_range manually)
21/41 Checking commit 55b926c57a1b (tcg/aarch64: Support split-wx code generation)
22/41 Checking commit c55a8c0c489d (disas: Push const down through host disasassembly)
23/41 Checking commit 1cab4182fb0e (tcg/tci: Push const down through bytecode reading)
24/41 Checking commit 5f81f0e007d9 (tcg: Introduce tcg_tbrel_diff)
25/41 Checking commit 4c4f647cce7b (tcg/ppc: Use tcg_tbrel_diff)
26/41 Checking commit a254bfdddaf2 (tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB)
27/41 Checking commit 684c281aa228 (tcg/ppc: Support split-wx code generation)
28/41 Checking commit 5a837a3879fe (tcg/sparc: Use tcg_tbrel_diff)
29/41 Checking commit f0fea6377b00 (tcg/sparc: Support split-wx code generation)
30/41 Checking commit 8d88879495b6 (tcg/s390: Use tcg_tbrel_diff)
31/41 Checking commit dff34e06dd91 (tcg/s390: Support split-wx code generation)
32/41 Checking commit 63883fcc4015 (tcg/riscv: Fix branch range checks)
33/41 Checking commit 1c6764de6cda (tcg/riscv: Remove branch-over-branch fallback)
34/41 Checking commit edd72db707ca (tcg/riscv: Support split-wx code generation)
35/41 Checking commit 200ecb3d750f (accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd)
WARNING: architecture specific defines should be avoided
#25: FILE: accel/tcg/translate-all.c:1143:
+#ifdef __mips__

WARNING: architecture specific defines should be avoided
#43: FILE: accel/tcg/translate-all.c:1160:
+#ifdef __mips__

total: 0 errors, 2 warnings, 68 lines checked

Patch 35/41 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
36/41 Checking commit 7f12d40b3470 (tcg/mips: Do not assert on relocation overflow)
37/41 Checking commit a873c6132612 (tcg/mips: Support split-wx code generation)
38/41 Checking commit 545feb70c9a8 (tcg/arm: Support split-wx code generation)
39/41 Checking commit a009e993d945 (tcg: Remove TCG_TARGET_SUPPORT_MIRROR)
40/41 Checking commit c33649448a69 (tcg: Constify tcg_code_gen_epilogue)
41/41 Checking commit 170f3100faa4 (tcg: Constify TCGLabelQemuLdst.raddr)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20201106032921.600200-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Joelle van Dyne Nov. 8, 2020, 3:38 a.m. UTC | #2
LGTM, tested and working on iOS.

-j

On Thu, Nov 5, 2020 at 7:29 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> This is my take on Joelle's patch set:

> https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg07837.html

>

> Changes for v3:

>   * Even more patches -- all tcg backends converted.

>   * Fixups for darwin/ios merged (Joelle).

>   * Feature renamed to splitwx (Paolo).

>

>

> r~

>

>

> Richard Henderson (41):

>   tcg: Enhance flush_icache_range with separate data pointer

>   tcg: Move tcg prologue pointer out of TCGContext

>   tcg: Move tcg epilogue pointer out of TCGContext

>   tcg: Add in_code_gen_buffer

>   tcg: Introduce tcg_splitwx_to_{rx,rw}

>   tcg: Adjust TCGLabel for const

>   tcg: Adjust tcg_out_call for const

>   tcg: Adjust tcg_out_label for const

>   tcg: Adjust tcg_register_jit for const

>   tcg: Adjust tb_target_set_jmp_target for split-wx

>   tcg: Make DisasContextBase.tb const

>   tcg: Make tb arg to synchronize_from_tb const

>   tcg: Use Error with alloc_code_gen_buffer

>   tcg: Add --accel tcg,split-wx property

>   accel/tcg: Support split-wx for linux with memfd

>   accel/tcg: Support split-wx for darwin/iOS with vm_remap

>   tcg: Return the TB pointer from the rx region from exit_tb

>   tcg/i386: Support split-wx code generation

>   tcg/aarch64: Use B not BL for tcg_out_goto_long

>   tcg/aarch64: Implement flush_idcache_range manually

>   tcg/aarch64: Support split-wx code generation

>   disas: Push const down through host disasassembly

>   tcg/tci: Push const down through bytecode reading

>   tcg: Introduce tcg_tbrel_diff

>   tcg/ppc: Use tcg_tbrel_diff

>   tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB

>   tcg/ppc: Support split-wx code generation

>   tcg/sparc: Use tcg_tbrel_diff

>   tcg/sparc: Support split-wx code generation

>   tcg/s390: Use tcg_tbrel_diff

>   tcg/s390: Support split-wx code generation

>   tcg/riscv: Fix branch range checks

>   tcg/riscv: Remove branch-over-branch fallback

>   tcg/riscv: Support split-wx code generation

>   accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd

>   tcg/mips: Do not assert on relocation overflow

>   tcg/mips: Support split-wx code generation

>   tcg/arm: Support split-wx code generation

>   tcg: Remove TCG_TARGET_SUPPORT_MIRROR

>   tcg: Constify tcg_code_gen_epilogue

>   tcg: Constify TCGLabelQemuLdst.raddr

>

>  accel/tcg/tcg-runtime.h      |   2 +-

>  include/disas/dis-asm.h      |   4 +-

>  include/disas/disas.h        |   2 +-

>  include/exec/exec-all.h      |   2 +-

>  include/exec/gen-icount.h    |   4 +-

>  include/exec/log.h           |   2 +-

>  include/exec/translator.h    |   2 +-

>  include/hw/core/cpu.h        |   3 +-

>  include/sysemu/tcg.h         |   3 +-

>  include/tcg/tcg-op.h         |   2 +-

>  include/tcg/tcg.h            |  56 +++++--

>  tcg/aarch64/tcg-target.h     |   8 +-

>  tcg/arm/tcg-target.h         |  10 +-

>  tcg/i386/tcg-target.h        |   9 +-

>  tcg/mips/tcg-target.h        |  10 +-

>  tcg/ppc/tcg-target.h         |   4 +-

>  tcg/riscv/tcg-target.h       |  10 +-

>  tcg/s390/tcg-target.h        |  11 +-

>  tcg/sparc/tcg-target.h       |  10 +-

>  tcg/tci/tcg-target.h         |  11 +-

>  accel/tcg/cpu-exec.c         |  41 +++--

>  accel/tcg/tcg-all.c          |  26 ++-

>  accel/tcg/tcg-runtime.c      |   4 +-

>  accel/tcg/translate-all.c    | 307 +++++++++++++++++++++++++++--------

>  accel/tcg/translator.c       |   4 +-

>  bsd-user/main.c              |   2 +-

>  disas.c                      |   2 +-

>  disas/capstone.c             |   2 +-

>  linux-user/main.c            |   2 +-

>  softmmu/physmem.c            |   9 +-

>  target/arm/cpu.c             |   3 +-

>  target/arm/translate-a64.c   |   2 +-

>  target/avr/cpu.c             |   3 +-

>  target/hppa/cpu.c            |   3 +-

>  target/i386/cpu.c            |   3 +-

>  target/microblaze/cpu.c      |   3 +-

>  target/mips/cpu.c            |   3 +-

>  target/riscv/cpu.c           |   3 +-

>  target/rx/cpu.c              |   3 +-

>  target/sh4/cpu.c             |   3 +-

>  target/sparc/cpu.c           |   3 +-

>  target/tricore/cpu.c         |   2 +-

>  tcg/tcg-op.c                 |  15 +-

>  tcg/tcg.c                    |  86 ++++++++--

>  tcg/tci.c                    |  60 ++++---

>  accel/tcg/trace-events       |   2 +-

>  tcg/aarch64/tcg-target.c.inc | 139 ++++++++++++----

>  tcg/arm/tcg-target.c.inc     |  41 ++---

>  tcg/i386/tcg-target.c.inc    |  36 ++--

>  tcg/mips/tcg-target.c.inc    |  97 +++++------

>  tcg/ppc/tcg-target.c.inc     | 105 ++++++------

>  tcg/riscv/tcg-target.c.inc   | 125 +++++---------

>  tcg/s390/tcg-target.c.inc    |  91 +++++------

>  tcg/sparc/tcg-target.c.inc   |  58 +++----

>  tcg/tcg-ldst.c.inc           |   2 +-

>  tcg/tcg-pool.c.inc           |   6 +-

>  tcg/tci/tcg-target.c.inc     |   2 +-

>  57 files changed, 917 insertions(+), 546 deletions(-)

>

> --

> 2.25.1

>
Joelle van Dyne Nov. 17, 2020, 3:47 a.m. UTC | #3
Hi, I'm wondering what the progress is for this patch set and the iOS
support one? I know 5.2 is frozen, so will this be considered for 6.0?
Apple Silicon Macs are out now and a few people are asking about QEMU
support :)

-j

On Thu, Nov 5, 2020 at 9:29 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> This is my take on Joelle's patch set:

> https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg07837.html

>

> Changes for v3:

>   * Even more patches -- all tcg backends converted.

>   * Fixups for darwin/ios merged (Joelle).

>   * Feature renamed to splitwx (Paolo).

>

>

> r~

>

>

> Richard Henderson (41):

>   tcg: Enhance flush_icache_range with separate data pointer

>   tcg: Move tcg prologue pointer out of TCGContext

>   tcg: Move tcg epilogue pointer out of TCGContext

>   tcg: Add in_code_gen_buffer

>   tcg: Introduce tcg_splitwx_to_{rx,rw}

>   tcg: Adjust TCGLabel for const

>   tcg: Adjust tcg_out_call for const

>   tcg: Adjust tcg_out_label for const

>   tcg: Adjust tcg_register_jit for const

>   tcg: Adjust tb_target_set_jmp_target for split-wx

>   tcg: Make DisasContextBase.tb const

>   tcg: Make tb arg to synchronize_from_tb const

>   tcg: Use Error with alloc_code_gen_buffer

>   tcg: Add --accel tcg,split-wx property

>   accel/tcg: Support split-wx for linux with memfd

>   accel/tcg: Support split-wx for darwin/iOS with vm_remap

>   tcg: Return the TB pointer from the rx region from exit_tb

>   tcg/i386: Support split-wx code generation

>   tcg/aarch64: Use B not BL for tcg_out_goto_long

>   tcg/aarch64: Implement flush_idcache_range manually

>   tcg/aarch64: Support split-wx code generation

>   disas: Push const down through host disasassembly

>   tcg/tci: Push const down through bytecode reading

>   tcg: Introduce tcg_tbrel_diff

>   tcg/ppc: Use tcg_tbrel_diff

>   tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB

>   tcg/ppc: Support split-wx code generation

>   tcg/sparc: Use tcg_tbrel_diff

>   tcg/sparc: Support split-wx code generation

>   tcg/s390: Use tcg_tbrel_diff

>   tcg/s390: Support split-wx code generation

>   tcg/riscv: Fix branch range checks

>   tcg/riscv: Remove branch-over-branch fallback

>   tcg/riscv: Support split-wx code generation

>   accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd

>   tcg/mips: Do not assert on relocation overflow

>   tcg/mips: Support split-wx code generation

>   tcg/arm: Support split-wx code generation

>   tcg: Remove TCG_TARGET_SUPPORT_MIRROR

>   tcg: Constify tcg_code_gen_epilogue

>   tcg: Constify TCGLabelQemuLdst.raddr

>

>  accel/tcg/tcg-runtime.h      |   2 +-

>  include/disas/dis-asm.h      |   4 +-

>  include/disas/disas.h        |   2 +-

>  include/exec/exec-all.h      |   2 +-

>  include/exec/gen-icount.h    |   4 +-

>  include/exec/log.h           |   2 +-

>  include/exec/translator.h    |   2 +-

>  include/hw/core/cpu.h        |   3 +-

>  include/sysemu/tcg.h         |   3 +-

>  include/tcg/tcg-op.h         |   2 +-

>  include/tcg/tcg.h            |  56 +++++--

>  tcg/aarch64/tcg-target.h     |   8 +-

>  tcg/arm/tcg-target.h         |  10 +-

>  tcg/i386/tcg-target.h        |   9 +-

>  tcg/mips/tcg-target.h        |  10 +-

>  tcg/ppc/tcg-target.h         |   4 +-

>  tcg/riscv/tcg-target.h       |  10 +-

>  tcg/s390/tcg-target.h        |  11 +-

>  tcg/sparc/tcg-target.h       |  10 +-

>  tcg/tci/tcg-target.h         |  11 +-

>  accel/tcg/cpu-exec.c         |  41 +++--

>  accel/tcg/tcg-all.c          |  26 ++-

>  accel/tcg/tcg-runtime.c      |   4 +-

>  accel/tcg/translate-all.c    | 307 +++++++++++++++++++++++++++--------

>  accel/tcg/translator.c       |   4 +-

>  bsd-user/main.c              |   2 +-

>  disas.c                      |   2 +-

>  disas/capstone.c             |   2 +-

>  linux-user/main.c            |   2 +-

>  softmmu/physmem.c            |   9 +-

>  target/arm/cpu.c             |   3 +-

>  target/arm/translate-a64.c   |   2 +-

>  target/avr/cpu.c             |   3 +-

>  target/hppa/cpu.c            |   3 +-

>  target/i386/cpu.c            |   3 +-

>  target/microblaze/cpu.c      |   3 +-

>  target/mips/cpu.c            |   3 +-

>  target/riscv/cpu.c           |   3 +-

>  target/rx/cpu.c              |   3 +-

>  target/sh4/cpu.c             |   3 +-

>  target/sparc/cpu.c           |   3 +-

>  target/tricore/cpu.c         |   2 +-

>  tcg/tcg-op.c                 |  15 +-

>  tcg/tcg.c                    |  86 ++++++++--

>  tcg/tci.c                    |  60 ++++---

>  accel/tcg/trace-events       |   2 +-

>  tcg/aarch64/tcg-target.c.inc | 139 ++++++++++++----

>  tcg/arm/tcg-target.c.inc     |  41 ++---

>  tcg/i386/tcg-target.c.inc    |  36 ++--

>  tcg/mips/tcg-target.c.inc    |  97 +++++------

>  tcg/ppc/tcg-target.c.inc     | 105 ++++++------

>  tcg/riscv/tcg-target.c.inc   | 125 +++++---------

>  tcg/s390/tcg-target.c.inc    |  91 +++++------

>  tcg/sparc/tcg-target.c.inc   |  58 +++----

>  tcg/tcg-ldst.c.inc           |   2 +-

>  tcg/tcg-pool.c.inc           |   6 +-

>  tcg/tci/tcg-target.c.inc     |   2 +-

>  57 files changed, 917 insertions(+), 546 deletions(-)

>

> --

> 2.25.1

>
Richard Henderson Nov. 17, 2020, 3:20 p.m. UTC | #4
On 11/16/20 7:47 PM, Joelle van Dyne wrote:
> Hi, I'm wondering what the progress is for this patch set and the iOS

> support one? I know 5.2 is frozen, so will this be considered for 6.0?

> Apple Silicon Macs are out now and a few people are asking about QEMU

> support :)


Yes, this will be considered for 6.0.

It does need to be reviewed more completely than a "LGTM", but there's time for
that.


r~
Joelle van Dyne Nov. 17, 2020, 3:31 p.m. UTC | #5
Sorry, are you asking for a review from me? I don’t know if I’m
qualified to review the other patches but I did review the iOS patch.

-j

On Tue, Nov 17, 2020 at 9:20 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> On 11/16/20 7:47 PM, Joelle van Dyne wrote:

> > Hi, I'm wondering what the progress is for this patch set and the iOS

> > support one? I know 5.2 is frozen, so will this be considered for 6.0?

> > Apple Silicon Macs are out now and a few people are asking about QEMU

> > support :)

>

> Yes, this will be considered for 6.0.

>

> It does need to be reviewed more completely than a "LGTM", but there's time for

> that.

>

>

> r~
Alex Bennée Nov. 17, 2020, 5:26 p.m. UTC | #6
Joelle van Dyne <j@getutm.app> writes:

> Sorry, are you asking for a review from me? I don’t know if I’m

> qualified to review the other patches but I did review the iOS patch.


Anyone can review code and given you wrote the original patches you
certainly know enough about the flow to give some opinion. If things
aren't clear then please do ask questions. The pool of TCG backend
reviewers is small enough and helping out does help.

Failing that you can always send Tested-by: tags once you've tested a
series on the HW.

>

> -j

>

> On Tue, Nov 17, 2020 at 9:20 AM Richard Henderson

> <richard.henderson@linaro.org> wrote:

>>

>> On 11/16/20 7:47 PM, Joelle van Dyne wrote:

>> > Hi, I'm wondering what the progress is for this patch set and the iOS

>> > support one? I know 5.2 is frozen, so will this be considered for 6.0?

>> > Apple Silicon Macs are out now and a few people are asking about QEMU

>> > support :)

>>

>> Yes, this will be considered for 6.0.

>>

>> It does need to be reviewed more completely than a "LGTM", but there's time for

>> that.

>>

>>

>> r~



-- 
Alex Bennée