| Message ID | 20201009064449.2336-1-zhaolichang@huawei.com |
|---|---|
| Headers | show |
| Series | fix some comment spelling errors | expand |
Patchew URL: https://patchew.org/QEMU/20201009064449.2336-1-zhaolichang@huawei.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20201009064449.2336-1-zhaolichang@huawei.com Subject: [PATCH V2 00/14] fix some comment spelling errors === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu * [new tag] patchew/20201009064449.2336-1-zhaolichang@huawei.com -> patchew/20201009064449.2336-1-zhaolichang@huawei.com * [new tag] patchew/20201009064858.323624-1-armbru@redhat.com -> patchew/20201009064858.323624-1-armbru@redhat.com Switched to a new branch 'test' 25b65d8 target/: fix some comment spelling errors 085cdde alpha/: fix some comment spelling errors ec812f0 arm/: fix some comment spelling errors 729762d avr/: fix some comment spelling errors 3e0605c i386/: fix some comment spelling errors 02d26f2 sh4/: fix some comment spelling errors cc0c6a7 m68k/: fix some comment spelling errors d3713f0 s390x/: fix some comment spelling errors be98a94 mips/: fix some comment spelling errors 68e09fe tricore/: fix some comment spelling errors a8a59c3 rx/: fix some comment spelling errors c6e1b75 riscv/: fix some comment spelling errors a898e79 ppc/: fix some comment spelling errors b6fffd3 cris/: fix some comment spelling errors === OUTPUT BEGIN === 1/14 Checking commit b6fffd33b968 (cris/: fix some comment spelling errors) WARNING: Block comments use a leading /* on a separate line #23: FILE: target/cris/helper.c:144: + /* These exceptions are generated by the core itself. WARNING: Block comments use a leading /* on a separate line #32: FILE: target/cris/helper.c:200: + /* These exceptions are generated by the core itself. WARNING: Block comments use a leading /* on a separate line #41: FILE: target/cris/helper.c:259: + /* Clear the excption_index to avoid spurious hw_aborts for recursive ERROR: trailing whitespace #112: FILE: target/cris/translate.c:3056: + * The TB containing the branch insn will set up env->btarget and evaluate $ total: 1 errors, 3 warnings, 86 lines checked Patch 1/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 2/14 Checking commit a898e796b356 (ppc/: fix some comment spelling errors) 3/14 Checking commit c6e1b757e105 (riscv/: fix some comment spelling errors) 4/14 Checking commit a8a59c37ccbf (rx/: fix some comment spelling errors) 5/14 Checking commit 68e09fe5f350 (tricore/: fix some comment spelling errors) WARNING: Block comments use a trailing */ on a separate line #46: FILE: target/tricore/translate.c:400: + since no exception occurs */ total: 0 errors, 1 warnings, 21 lines checked Patch 5/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/14 Checking commit be98a94fb597 (mips/: fix some comment spelling errors) 7/14 Checking commit d3713f00a7b9 (s390x/: fix some comment spelling errors) 8/14 Checking commit cc0c6a7697e5 (m68k/: fix some comment spelling errors) 9/14 Checking commit 02d26f2e1170 (sh4/: fix some comment spelling errors) ERROR: code indent should never use tabs #24: FILE: target/sh4/cpu.h:163: + uint32_t ttb;^I^I/* translation table base register */$ WARNING: Block comments use a trailing */ on a separate line #37: FILE: target/sh4/op_helper.c:403: + IEEE rule that other exceptions take precedence. */ WARNING: Block comments use a leading /* on a separate line #50: FILE: target/sh4/translate.c:1962: + /* Here we want to recognize ld_dst being saved for later consumption, total: 1 errors, 2 warnings, 24 lines checked Patch 9/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 10/14 Checking commit 3e0605cc7e54 (i386/: fix some comment spelling errors) WARNING: Block comments use a leading /* on a separate line #23: FILE: target/i386/cpu.c:4680: +/* Compatibility hack to maintain legacy +-feat semantic, WARNING: Block comments use a trailing */ on a separate line #121: FILE: target/i386/translate.c:896: + value 'b'. In the fast case, T0 is guaranteed not to be used. */ WARNING: Block comments use a trailing */ on a separate line #130: FILE: target/i386/translate.c:1029: + value 'b'. In the fast case, T0 is guaranteed not to be used. */ WARNING: Block comments use a leading /* on a separate line #148: FILE: target/i386/translate.c:6844: + /* Needs no atomic ops; we suppressed the normal total: 0 errors, 4 warnings, 110 lines checked Patch 10/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 11/14 Checking commit 729762daa63d (avr/: fix some comment spelling errors) 12/14 Checking commit ec812f092ed3 (arm/: fix some comment spelling errors) WARNING: Block comments use a leading /* on a separate line #24: FILE: target/arm/cpu.h:2093: +/* Function for determining whether guest cp register reads and writes should total: 0 errors, 1 warnings, 56 lines checked Patch 12/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 13/14 Checking commit 085cdde202db (alpha/: fix some comment spelling errors) WARNING: Block comments use a leading /* on a separate line #33: FILE: target/alpha/cpu.h:373: +/* CPUAlphaState->flags constants. These are laid out so that we total: 0 errors, 1 warnings, 24 lines checked Patch 13/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 14/14 Checking commit 25b65d88a33a (target/: fix some comment spelling errors) ERROR: code indent should never use tabs #37: FILE: target/sparc/asi.h:234: +#define ASI_IC_INSTR^I^I0x66 /* Insn cache instruction ram diag^I*/$ total: 1 errors, 0 warnings, 24 lines checked Patch 14/14 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20201009064449.2336-1-zhaolichang@huawei.com/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
On 09/10/2020 08.44, zhaolichang wrote: > I found that there are many spelling errors in the comments of qemu/target/s390x. > I used spellcheck to check the spelling errors and found some errors in the folder. > > Signed-off-by: zhaolichang <zhaolichang@huawei.com> > Reviewed-by: David Edmondson <david.edmondson@oracle.com> > --- > target/s390x/cpu_models.h | 4 ++-- > target/s390x/excp_helper.c | 2 +- > target/s390x/fpu_helper.c | 2 +- > target/s390x/insn-data.def | 2 +- > target/s390x/misc_helper.c | 2 +- > target/s390x/translate.c | 4 ++-- > target/s390x/translate_vx.c.inc | 2 +- > 7 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/target/s390x/cpu_models.h b/target/s390x/cpu_models.h > index 74d1f87e4f..15c0f0dcfe 100644 > --- a/target/s390x/cpu_models.h > +++ b/target/s390x/cpu_models.h > @@ -24,13 +24,13 @@ struct S390CPUDef { > uint8_t gen; /* hw generation identification */ > uint16_t type; /* cpu type identification */ > uint8_t ec_ga; /* EC GA version (on which also the BC is based) */ > - uint8_t mha_pow; /* Maximum Host Adress Power, mha = 2^pow-1 */ > + uint8_t mha_pow; /* Maximum Host Address Power, mha = 2^pow-1 */ > uint32_t hmfai; /* hypervisor-managed facilities */ > /* base/min features, must never be changed between QEMU versions */ > S390FeatBitmap base_feat; > /* used to init base_feat from generated data */ > S390FeatInit base_init; > - /* deafault features, QEMU version specific */ > + /* default features, QEMU version specific */ > S390FeatBitmap default_feat; > /* used to init default_feat from generated data */ > S390FeatInit default_init; > diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c > index 0adfbbda27..36ab5c7c43 100644 > --- a/target/s390x/excp_helper.c > +++ b/target/s390x/excp_helper.c > @@ -538,7 +538,7 @@ try_deliver: > /* don't trigger a cpu_loop_exit(), use an interrupt instead */ > cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT); > } else if (cs->halted) { > - /* unhalt if we had a WAIT PSW somehwere in our injection chain */ > + /* unhalt if we had a WAIT PSW somewhere in our injection chain */ > s390_cpu_unhalt(cpu); > } > } > diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c > index f155bc048c..3e609b7fd0 100644 > --- a/target/s390x/fpu_helper.c > +++ b/target/s390x/fpu_helper.c > @@ -89,7 +89,7 @@ static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr) > /* > * invalid/divbyzero cannot coexist with other conditions. > * overflow/underflow however can coexist with inexact, we have to > - * handle it separatly. > + * handle it separately. > */ > if (s390_exc & ~S390_IEEE_MASK_INEXACT) { > if (s390_exc & ~S390_IEEE_MASK_INEXACT & env->fpc >> 24) { > diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def > index d3bcdfd67b..2469415319 100644 > --- a/target/s390x/insn-data.def > +++ b/target/s390x/insn-data.def > @@ -526,7 +526,7 @@ > /* LOAD LOGICAL HALFWORD RELATIVE LONG */ > C(0xc402, LLHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16u, 0) > C(0xc406, LLGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16u, 0) > -/* LOAD LOGICAL IMMEDATE */ > +/* LOAD LOGICAL IMMEDIATE */ > D(0xc00e, LLIHF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 32) > D(0xc00f, LLILF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 0) > D(0xa50c, LLIHH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 48) > diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c > index 58dbc023eb..929e509519 100644 > --- a/target/s390x/misc_helper.c > +++ b/target/s390x/misc_helper.c > @@ -312,7 +312,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) > /* same as machine type number in STORE CPU ID, but in EBCDIC */ > snprintf(type, ARRAY_SIZE(type), "%X", cpu->model->def->type); > ebcdic_put(sysib.sysib_111.type, type, 4); > - /* model number (not stored in STORE CPU ID for z/Architecure) */ > + /* model number (not stored in STORE CPU ID for z/Architecture) */ > ebcdic_put(sysib.sysib_111.model, "QEMU ", 16); > ebcdic_put(sysib.sysib_111.sequence, "QEMU ", 16); > ebcdic_put(sysib.sysib_111.plant, "QEMU", 4); > diff --git a/target/s390x/translate.c b/target/s390x/translate.c > index ac10f42f10..4395455e0a 100644 > --- a/target/s390x/translate.c > +++ b/target/s390x/translate.c > @@ -433,7 +433,7 @@ static void gen_program_exception(DisasContext *s, int code) > { > TCGv_i32 tmp; > > - /* Remember what pgm exeption this was. */ > + /* Remember what pgm exception this was. */ > tmp = tcg_const_i32(code); > tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUS390XState, int_pgm_code)); > tcg_temp_free_i32(tmp); > @@ -489,7 +489,7 @@ static TCGv_i64 get_address(DisasContext *s, int x2, int b2, int d2) > > /* > * Note that d2 is limited to 20 bits, signed. If we crop negative > - * displacements early we create larger immedate addends. > + * displacements early we create larger immediate addends. > */ > if (b2 && x2) { > tcg_gen_add_i64(tmp, regs[b2], regs[x2]); > diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc > index eb767f5288..983da56b9d 100644 > --- a/target/s390x/translate_vx.c.inc > +++ b/target/s390x/translate_vx.c.inc > @@ -789,7 +789,7 @@ static DisasJumpType op_vpk(DisasContext *s, DisasOps *o) > } > break; > case 0x94: > - /* If sources and destination dont't overlap -> fast path */ > + /* If sources and destination don't overlap -> fast path */ > if (v1 != v2 && v1 != v3) { > const uint8_t src_es = get_field(s, m4); > const uint8_t dst_es = src_es - 1; > Reviewed-by: Thomas Huth <thuth@redhat.com>
You forgot to Cc qemu-devel@. (See https://wiki.qemu.org/Contribute/SubmitAPatch#CC_the_relevant_maintainer) On Tue, Oct 20, 2020 at 4:46 AM Lichang Zhao <zhaolichang@huawei.com> wrote: Now your name is properly displayed, so I assume you finally ran: $ git config user.name "Lichang Zhao". To fix how your name is displayed in your previous contributions, consider sending this patch: -- >8 -- diff --git a/.mailmap b/.mailmap index 663819fb017..a56c5ba5ee1 100644 --- a/.mailmap +++ b/.mailmap @@ -113,6 +113,7 @@ Liu Yu <yu.liu@freescale.com> Liu Yu <Yu.Liu@freescale.com> Li Zhang <zhlcindy@gmail.com> Li Zhang <zhlcindy@linux.vnet.ibm.com> +Lichang Zhao <zhaolichang@huawei.com> Lluís Vilanova <vilanova@ac.upc.edu> Lluís Vilanova <xscript@gmx.net> Longpeng (Mike) <longpeng2@huawei.com> --- (or Ack-by it here and I'll send it). > > On 2020/10/9 14:44, zhaolichang wrote: > > I found that there are many spelling errors in the comments of qemu/target/. > > > > I used spellcheck to check the spelling errors and found some errors in the folder. > > > > > > > > The checkpatch.pl file in the Linux kernel can check spelling errors in patches. > > > > I'm trying to add this function to the checkpatch.pl in qemu, > > > > so that no similar spelling errors will occur in the feture. > > > > It's not done yet and I will commit the patch when it's done. > > > > > > > > v1 -> v2: > > > > add reviewed-by for patch > > > > > > > > Signed-off-by: zhaolichang <zhaolichang@huawei.com> > > > > ping > This series of patches have been reviewed. Can you help me to pull them? >
Thank you very much. But I don't know how to do that. Can you help me? By the way, this series of patches have been reviewed and four of them have been applied. Can you help me to apply the rest? On 2020/10/20 14:42, Philippe Mathieu-Daudé wrote: > You forgot to Cc qemu-devel@. > > (See https://wiki.qemu.org/Contribute/SubmitAPatch#CC_the_relevant_maintainer) > > On Tue, Oct 20, 2020 at 4:46 AM Lichang Zhao <zhaolichang@huawei.com> wrote: > > Now your name is properly displayed, so I assume you finally ran: > > $ git config user.name "Lichang Zhao". > > To fix how your name is displayed in your previous contributions, > consider sending this patch: > > -- >8 -- > diff --git a/.mailmap b/.mailmap > index 663819fb017..a56c5ba5ee1 100644 > --- a/.mailmap > +++ b/.mailmap > @@ -113,6 +113,7 @@ Liu Yu <yu.liu@freescale.com> > Liu Yu <Yu.Liu@freescale.com> > Li Zhang <zhlcindy@gmail.com> > Li Zhang <zhlcindy@linux.vnet.ibm.com> > +Lichang Zhao <zhaolichang@huawei.com> > Lluís Vilanova <vilanova@ac.upc.edu> > Lluís Vilanova <xscript@gmx.net> > Longpeng (Mike) <longpeng2@huawei.com> > > --- > > (or Ack-by it here and I'll send it). > >> >> On 2020/10/9 14:44, zhaolichang wrote: >>> I found that there are many spelling errors in the comments of qemu/target/. >>> >>> I used spellcheck to check the spelling errors and found some errors in the folder. >>> >>> >>> >>> The checkpatch.pl file in the Linux kernel can check spelling errors in patches. >>> >>> I'm trying to add this function to the checkpatch.pl in qemu, >>> >>> so that no similar spelling errors will occur in the feture. >>> >>> It's not done yet and I will commit the patch when it's done. >>> >>> >>> >>> v1 -> v2: >>> >>> add reviewed-by for patch >>> >>> >>> >>> Signed-off-by: zhaolichang <zhaolichang@huawei.com> >>> >> >> ping >> This series of patches have been reviewed. Can you help me to pull them? >> > . >
I found that there are many spelling errors in the comments of qemu/target/. I used spellcheck to check the spelling errors and found some errors in the folder. The checkpatch.pl file in the Linux kernel can check spelling errors in patches. I'm trying to add this function to the checkpatch.pl in qemu, so that no similar spelling errors will occur in the feture. It's not done yet and I will commit the patch when it's done. v1 -> v2: add reviewed-by for patch Signed-off-by: zhaolichang <zhaolichang@huawei.com> zhaolichang (14): cris/: fix some comment spelling errors ppc/: fix some comment spelling errors riscv/: fix some comment spelling errors rx/: fix some comment spelling errors tricore/: fix some comment spelling errors mips/: fix some comment spelling errors s390x/: fix some comment spelling errors m68k/: fix some comment spelling errors sh4/: fix some comment spelling errors i386/: fix some comment spelling errors avr/: fix some comment spelling errors arm/: fix some comment spelling errors alpha/: fix some comment spelling errors target/: fix some comment spelling errors target/alpha/cpu.h | 4 ++-- target/alpha/translate.c | 2 +- target/arm/cpu.h | 2 +- target/arm/helper.c | 4 ++-- target/arm/m_helper.c | 2 +- target/arm/translate-a64.c | 4 ++-- target/arm/translate-sve.c | 2 +- target/avr/helper.c | 6 +++--- target/cris/helper.c | 6 +++--- target/cris/op_helper.c | 2 +- target/cris/translate.c | 14 +++++++------- target/i386/cpu.c | 4 ++-- target/i386/hax-interface.h | 4 ++-- target/i386/hax-windows.c | 2 +- target/i386/kvm.c | 2 +- target/i386/machine.c | 6 +++--- target/i386/translate.c | 8 ++++---- target/i386/whpx-all.c | 2 +- target/m68k/translate.c | 16 ++++++++-------- target/mips/internal.h | 2 +- target/mips/translate.c | 10 +++++----- target/mips/translate_init.c.inc | 2 +- target/openrisc/cpu.h | 2 +- target/ppc/cpu.h | 6 +++--- target/ppc/excp_helper.c | 6 +++--- target/ppc/fpu_helper.c | 2 +- target/ppc/internal.h | 2 +- target/ppc/kvm.c | 2 +- target/ppc/machine.c | 2 +- target/ppc/mmu-hash64.c | 2 +- target/ppc/mmu_helper.c | 4 ++-- target/ppc/translate_init.c.inc | 2 +- target/riscv/cpu.c | 2 +- target/riscv/cpu_bits.h | 2 +- target/riscv/csr.c | 6 +++--- target/riscv/vector_helper.c | 2 +- target/rx/op_helper.c | 2 +- target/rx/translate.c | 2 +- target/s390x/cpu_models.h | 4 ++-- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 2 +- target/s390x/insn-data.def | 2 +- target/s390x/ioinst.c | 2 +- target/s390x/misc_helper.c | 2 +- target/s390x/translate.c | 4 ++-- target/s390x/translate_vx.c.inc | 2 +- target/sh4/cpu.h | 2 +- target/sh4/op_helper.c | 2 +- target/sh4/translate.c | 2 +- target/sparc/asi.h | 2 +- target/tricore/csfr.def | 2 +- target/tricore/translate.c | 2 +- target/unicore32/translate.c | 2 +- 53 files changed, 93 insertions(+), 93 deletions(-)