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[189.204.159.168]) by smtp.gmail.com with ESMTPSA id w64sm4701933oig.31.2020.10.08.05.57.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2020 05:57:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/11] tcg patch queue Date: Thu, 8 Oct 2020 07:56:48 -0500 Message-Id: <20201008125659.49857-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x336.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The following changes since commit 6eeea6725a70e6fcb5abba0764496bdab07ddfb3: Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-10-06' into staging (2020-10-06 21:13:34 +0100) are available in the Git repository at: https://github.com/rth7680/qemu.git tags/pull-tcg-20201008 for you to fetch changes up to 62475e9d007d83db4d0a6ccebcda8914f392e9c9: accel/tcg: Fix computing of is_write for MIPS (2020-10-08 05:57:32 -0500) ---------------------------------------------------------------- Extend maximum gvec vector size Fix i386 avx2 dupi Fix mips host user-only write detection Misc cleanups. ---------------------------------------------------------------- Kele Huang (1): accel/tcg: Fix computing of is_write for MIPS Richard Henderson (10): tcg: Adjust simd_desc size encoding tcg: Drop union from TCGArgConstraint tcg: Move sorted_args into TCGArgConstraint.sort_index tcg: Remove TCG_CT_REG tcg: Move some TCG_CT_* bits to TCGArgConstraint bitfields tcg: Remove TCGOpDef.used tcg/i386: Fix dupi for avx2 32-bit hosts tcg: Fix generation of dupi_vec for 32-bit host tcg/optimize: Fold dup2_vec tcg: Remove TCG_TARGET_HAS_cmp_vec include/tcg/tcg-gvec-desc.h | 38 ++++++++++++------ include/tcg/tcg.h | 22 ++++------ tcg/aarch64/tcg-target.h | 1 - tcg/i386/tcg-target.h | 1 - tcg/ppc/tcg-target.h | 1 - accel/tcg/user-exec.c | 43 ++++++++++++++++++-- tcg/optimize.c | 15 +++++++ tcg/tcg-op-gvec.c | 35 ++++++++++++---- tcg/tcg-op-vec.c | 12 ++++-- tcg/tcg.c | 96 +++++++++++++++++++------------------------- tcg/aarch64/tcg-target.c.inc | 17 ++++---- tcg/arm/tcg-target.c.inc | 29 ++++++------- tcg/i386/tcg-target.c.inc | 39 +++++++----------- tcg/mips/tcg-target.c.inc | 21 +++++----- tcg/ppc/tcg-target.c.inc | 29 ++++++------- tcg/riscv/tcg-target.c.inc | 16 ++++---- tcg/s390/tcg-target.c.inc | 22 +++++----- tcg/sparc/tcg-target.c.inc | 21 ++++------ tcg/tci/tcg-target.c.inc | 3 +- 19 files changed, 244 insertions(+), 217 deletions(-)