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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id u9sm2421775pfn.197.2020.05.08.11.26.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 11:26:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 00/19] tcg: Better handling of constants Date: Fri, 8 May 2020 11:25:57 -0700 Message-Id: <20200508182616.18318-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" V4 adds the r-b against v2 that I forgot to go back and add. Re patch 17, Alex asked if I could ifdef tcg_reg_alloc_dup2 instead of assert within it. Answer: No, not without adding still more ifdefs to compensate. In the end I prefer the assert. V3 fixes the target/sparc regression during register allocation. V1 blurb: This promotes constants to full-fledged temporaries, which are then hashed so we have only a single copy across the TB. If an opcode requires forcing one into a register, then we will only do this once -- at least until the register is killed, e.g. by a function call. While this is probably an modest improvement for integer code, it is significant for SVE vector code. In particular, where a generator function loads a constant for the operation, and then the generator function is called N times for the N x 128-bit vector. Previously we'd be loading up the same constant N times and now we do so only once. The existing tcg_const_{type}() functions are unchanged, allocating a new temporary and initializing it. The constant propagation pass of the optimizer will generally remove the temporary when it turns out not to be modified further. This adds new tcg_constant_{type}() functions which produce a read-only temporary containing the constant which need not be freed. I have updated the generic expanders to take advantage of this, but have not touched the target front ends. This also, in the end, allows the complete removal of the tcg opcodes that create a constant: INDEX_op_movi_{i32,i64} and INDEX_op_dupi_vec. Loading of constants into hard registers is completely controlled by the register allocator. r~ Richard Henderson (19): tcg: Consolidate 3 bits into enum TCGTempKind tcg: Add temp_readonly tcg: Introduce TYPE_CONST temporaries tcg: Use tcg_constant_i32 with icount expander tcg: Use tcg_constant_{i32,i64} with tcg int expanders tcg: Use tcg_constant_{i32,vec} with tcg vec expanders tcg: Use tcg_constant_{i32,i64,vec} with tcg gvec expanders tcg: Use tcg_constant_{i32,i64} with tcg plugins tcg: Rename struct tcg_temp_info to TempOptInfo tcg/optimize: Improve find_better_copy tcg/optimize: Adjust TempOptInfo allocation tcg/optimize: Use tcg_constant_internal with constant folding tcg/tci: Add special tci_movi_{i32,i64} opcodes tcg: Remove movi and dupi opcodes tcg: Use tcg_out_dupi_vec from temp_load tcg: Increase tcg_out_dupi_vec immediate to int64_t tcg: Add tcg_reg_alloc_dup2 tcg/i386: Use tcg_constant_vec with tcg vec expanders tcg: Remove tcg_gen_dup{8,16,32,64}i_vec include/exec/gen-icount.h | 25 +-- include/tcg/tcg-op.h | 17 +- include/tcg/tcg-opc.h | 11 +- include/tcg/tcg.h | 50 ++++- accel/tcg/plugin-gen.c | 49 ++--- tcg/aarch64/tcg-target.inc.c | 12 +- tcg/arm/tcg-target.inc.c | 1 - tcg/i386/tcg-target.inc.c | 110 ++++++---- tcg/mips/tcg-target.inc.c | 2 - tcg/optimize.c | 204 +++++++++--------- tcg/ppc/tcg-target.inc.c | 24 +-- tcg/riscv/tcg-target.inc.c | 2 - tcg/s390/tcg-target.inc.c | 2 - tcg/sparc/tcg-target.inc.c | 2 - tcg/tcg-op-gvec.c | 125 +++++------ tcg/tcg-op-vec.c | 83 ++++---- tcg/tcg-op.c | 216 +++++++++---------- tcg/tcg.c | 397 ++++++++++++++++++++++++++--------- tcg/tci.c | 4 +- tcg/tci/tcg-target.inc.c | 6 +- 20 files changed, 751 insertions(+), 591 deletions(-) -- 2.20.1