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[97.126.123.70]) by smtp.gmail.com with ESMTPSA id i68sm5139399pfe.173.2020.02.18.11.09.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Feb 2020 11:10:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 0/7] target/arm: Honor more HCR_EL2 traps Date: Tue, 18 Feb 2020 11:09:51 -0800 Message-Id: <20200218190958.745-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Based-on: 20200214175116.9164-1-peter.maydell@linaro.org ("arm: ARMv8.1- and v8.4-PMU, ID reg cleanup, [H]ACTLR2") Patch 1 is a latent error that I noticed while reviewing Peter's patch set. Patches 2 and 3 have already appeared separately on list, with patch 2 bearing a v2. Thus this patch set is labeled v3. Patch 4 is dependant on Peter's [H]ACTLR2 fix, and the reason for the Based-on tag. r~ Richard Henderson (7): target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfn target/arm: Honor the HCR_EL2.{TVM,TRVM} bits target/arm: Honor the HCR_EL2.TSW bit target/arm: Honor the HCR_EL2.TACR bit target/arm: Honor the HCR_EL2.TPCP bit target/arm: Honor the HCR_EL2.TPU bit target/arm: Honor the HCR_EL2.TTLB bit target/arm/cpu64.c | 1 + target/arm/helper.c | 284 ++++++++++++++++++++++++++++++-------------- 2 files changed, 196 insertions(+), 89 deletions(-) -- 2.20.1