Message ID | 20190923230004.9231-1-richard.henderson@linaro.org |
---|---|
Headers | show |
Series | Move rom and notdirty handling to cputlb | expand |
On 23/09/2019 23:59, Richard Henderson wrote: > Changes since v3: > * Don't accidentally include the TARGET_PAGE_BITS_VARY patch set. ;-) > * Remove __has_attribute(__always_inline__). > * Use single load/store_memop function instead of separate small wrappers. > * Introduce optimize_away to assert the code folds away as expected. > > Patches without review: > > 0003-qemu-compiler.h-Add-optimize_away.patch > 0004-cputlb-Use-optimize_away-in-load-store_helpers.patch > 0005-cputlb-Split-out-load-store_memop.patch > 0010-cputlb-Partially-inline-memory_region_section_get.patch > 0011-cputlb-Merge-and-move-memory_notdirty_write_-prep.patch > 0012-cputlb-Handle-TLB_NOTDIRTY-in-probe_access.patch > > > r~ > > > Richard Henderson (16): > exec: Use TARGET_PAGE_BITS_MIN for TLB flags > cputlb: Disable __always_inline__ without optimization > qemu/compiler.h: Add optimize_away > cputlb: Use optimize_away in load/store_helpers > cputlb: Split out load/store_memop > cputlb: Introduce TLB_BSWAP > exec: Adjust notdirty tracing > cputlb: Move ROM handling from I/O path to TLB path > cputlb: Move NOTDIRTY handling from I/O path to TLB path > cputlb: Partially inline memory_region_section_get_iotlb > cputlb: Merge and move memory_notdirty_write_{prepare,complete} > cputlb: Handle TLB_NOTDIRTY in probe_access > cputlb: Remove cpu->mem_io_vaddr > cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access > cputlb: Pass retaddr to tb_invalidate_phys_page_fast > cputlb: Pass retaddr to tb_check_watchpoint > > accel/tcg/translate-all.h | 8 +- > include/exec/cpu-all.h | 23 ++- > include/exec/cpu-common.h | 3 - > include/exec/exec-all.h | 6 +- > include/exec/memory-internal.h | 65 ------- > include/hw/core/cpu.h | 2 - > include/qemu/compiler.h | 26 +++ > accel/tcg/cputlb.c | 340 +++++++++++++++++++-------------- > accel/tcg/translate-all.c | 51 +++-- > exec.c | 158 +-------------- > hw/core/cpu.c | 1 - > memory.c | 20 -- > trace-events | 4 +- > 13 files changed, 279 insertions(+), 428 deletions(-) Am I right in thinking that this is now the latest version of the patchset which fixes up the byte swaps in RAM? I'm not sure that I can offer much in the way of review, however is there any testing I can do to help out here? ATB, Mark.
On 25/09/2019 19:52, Mark Cave-Ayland wrote: > On 23/09/2019 23:59, Richard Henderson wrote: > >> Changes since v3: >> * Don't accidentally include the TARGET_PAGE_BITS_VARY patch set. ;-) >> * Remove __has_attribute(__always_inline__). >> * Use single load/store_memop function instead of separate small wrappers. >> * Introduce optimize_away to assert the code folds away as expected. >> >> Patches without review: >> >> 0003-qemu-compiler.h-Add-optimize_away.patch >> 0004-cputlb-Use-optimize_away-in-load-store_helpers.patch >> 0005-cputlb-Split-out-load-store_memop.patch >> 0010-cputlb-Partially-inline-memory_region_section_get.patch >> 0011-cputlb-Merge-and-move-memory_notdirty_write_-prep.patch >> 0012-cputlb-Handle-TLB_NOTDIRTY-in-probe_access.patch >> >> >> r~ >> >> >> Richard Henderson (16): >> exec: Use TARGET_PAGE_BITS_MIN for TLB flags >> cputlb: Disable __always_inline__ without optimization >> qemu/compiler.h: Add optimize_away >> cputlb: Use optimize_away in load/store_helpers >> cputlb: Split out load/store_memop >> cputlb: Introduce TLB_BSWAP >> exec: Adjust notdirty tracing >> cputlb: Move ROM handling from I/O path to TLB path >> cputlb: Move NOTDIRTY handling from I/O path to TLB path >> cputlb: Partially inline memory_region_section_get_iotlb >> cputlb: Merge and move memory_notdirty_write_{prepare,complete} >> cputlb: Handle TLB_NOTDIRTY in probe_access >> cputlb: Remove cpu->mem_io_vaddr >> cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access >> cputlb: Pass retaddr to tb_invalidate_phys_page_fast >> cputlb: Pass retaddr to tb_check_watchpoint >> >> accel/tcg/translate-all.h | 8 +- >> include/exec/cpu-all.h | 23 ++- >> include/exec/cpu-common.h | 3 - >> include/exec/exec-all.h | 6 +- >> include/exec/memory-internal.h | 65 ------- >> include/hw/core/cpu.h | 2 - >> include/qemu/compiler.h | 26 +++ >> accel/tcg/cputlb.c | 340 +++++++++++++++++++-------------- >> accel/tcg/translate-all.c | 51 +++-- >> exec.c | 158 +-------------- >> hw/core/cpu.c | 1 - >> memory.c | 20 -- >> trace-events | 4 +- >> 13 files changed, 279 insertions(+), 428 deletions(-) > > Am I right in thinking that this is now the latest version of the patchset which > fixes up the byte swaps in RAM? > > I'm not sure that I can offer much in the way of review, however is there any testing > I can do to help out here? Ha okay, I've just seen the TCG PR appear in my inbox so I'll assume that everyone is happy and everything is working as intended :) ATB, Mark.