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[173.198.79.114]) by smtp.gmail.com with ESMTPSA id d129sm46012024pfa.142.2019.04.08.21.13.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 Apr 2019 21:13:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 8 Apr 2019 18:13:35 -1000 Message-Id: <20190409041337.23602-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62e Subject: [Qemu-devel] [RISU 0/2] i386 support for avx X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jan.bobek@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It's quite plausible that we should add a command-line argument for risu, similar to the aarch64 --test-sve option, that explicitly limits the size of the vectors to be recorded or compared. Otherwise I worry about the host supporting AVX-N and wanting to test TCG with a narrower vector insns. Anyway, adding a command-line option should be a relatively trivial extension to the following, which works to extract state from the Intel XSAVE structure that the kernel borrows for the signal frame. r~ Richard Henderson (2): i386: Add avx512 state to reginfo_t HACK: Test avx2 state risu_reginfo_i386.h | 15 ++++ risu_reginfo_i386.c | 194 ++++++++++++++++++++++++++++++++++++++++++-- test_i386.S | 39 +++++++++ 3 files changed, 243 insertions(+), 5 deletions(-) -- 2.17.1