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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id w68sm5616666pfb.176.2019.03.19.10.21.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Mar 2019 10:21:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 19 Mar 2019 10:21:09 -0700 Message-Id: <20190319172126.7502-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::430 Subject: [Qemu-devel] [PATCH for-4.1 v3 00/17] tcg/ppc: Add vector opcodes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.cave-ayland@ilande.co.uk, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Changes since v2: * Several generic tcg patches to improve dup vs dupi vs dupm. In particular, if a global temp (like guest r10) is not in a host register, we should duplicate from memory instead of loading to an integer register, spilling to stack, loading to a vector register, and then duplicating. * I have more confidence that 32-bit ppc host should work this time around. No testing on that front yet, but I've unified some code sequences with 64-bit ppc host. * Base altivec now supports V128 only. Moved V64 support to Power7 (v2.06), which has 64-bit load/store. * Dropped support for 64-bit vector multiply using Power8. The expansion was too large compared to using integer regs. r~ Richard Henderson (17): target/arm: Fill in .opc for cmtst_op tcg: Assert fixed_reg is read-only tcg: Return bool success from tcg_out_mov tcg: Support cross-class moves without instruction support tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded tcg: Promote tcg_out_{dup,dupi}_vec to backend interface tcg: Manually expand INDEX_op_dup_vec tcg: Add tcg_out_dupm_vec to the backend interface tcg/i386: Implement tcg_out_dupm_vec tcg/aarch64: Implement tcg_out_dupm_vec tcg: Add INDEX_op_dup_mem_vec tcg/ppc: Initial backend support for Altivec tcg/ppc: Support vector shift by immediate tcg/ppc: Support vector multiply tcg/ppc: Update vector support to v2.06 tcg/ppc: Update vector support to v2.07 tcg/ppc: Update vector support to v3.00 tcg/ppc/tcg-target.h | 36 +- tcg/ppc/tcg-target.opc.h | 11 + tcg/tcg-op.h | 1 + tcg/tcg-opc.h | 1 + target/arm/translate.c | 4 + tcg/aarch64/tcg-target.inc.c | 70 ++- tcg/arm/tcg-target.inc.c | 7 +- tcg/i386/tcg-target.inc.c | 78 ++- tcg/mips/tcg-target.inc.c | 3 +- tcg/ppc/tcg-target.inc.c | 1077 +++++++++++++++++++++++++++++++--- tcg/riscv/tcg-target.inc.c | 5 +- tcg/s390/tcg-target.inc.c | 3 +- tcg/sparc/tcg-target.inc.c | 3 +- tcg/tcg-op-gvec.c | 88 +-- tcg/tcg-op-vec.c | 60 +- tcg/tcg.c | 252 ++++++-- tcg/tci/tcg-target.inc.c | 3 +- 17 files changed, 1482 insertions(+), 220 deletions(-) create mode 100644 tcg/ppc/tcg-target.opc.h -- 2.17.2 Signed-off-by: Richard Henderson