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[v2,0/3] target/arm: SB and PredInv extensions

Message ID 20190228022415.27878-1-richard.henderson@linaro.org
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Series target/arm: SB and PredInv extensions | expand

Message

Richard Henderson Feb. 28, 2019, 2:24 a.m. UTC 
Changes since v2:
  * Rebase on master, cherry-picking one required patch from
    the ARMv8.5-MemTag patch set.
  * Use the same form of TB exit for SB as for ISB.
  * Rename all the bits related to PredInv.
  * Fix registration for PredInv cache flush special regs,
    and spell out why in a comment.


r~


Richard Henderson (3):
  target/arm: Split out arm_sctlr
  target/arm: Implement ARMv8.0-SB
  target/arm: Implement ARMv8.0-PredRes

 target/arm/cpu.h           | 49 ++++++++++++++++++++++-------
 linux-user/elfload.c       |  1 +
 target/arm/cpu.c           |  2 ++
 target/arm/cpu64.c         |  4 +++
 target/arm/helper.c        | 63 ++++++++++++++++++++++++++++++++++----
 target/arm/translate-a64.c | 14 +++++++++
 target/arm/translate.c     | 22 +++++++++++++
 7 files changed, 138 insertions(+), 17 deletions(-)

-- 
2.17.2