From patchwork Mon Nov 12 21:44:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 150885 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3652258ljp; Mon, 12 Nov 2018 13:58:23 -0800 (PST) X-Google-Smtp-Source: AJdET5evE4U0PSePOuOzJiob2pD4kpu4w3b4Lvb70dwbKCcNPzpKHzbWg7EJt8U76u3PbbiBCZNv X-Received: by 2002:ad4:50cc:: with SMTP id e12mr2629387qvq.20.1542059903553; Mon, 12 Nov 2018 13:58:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542059903; cv=none; d=google.com; s=arc-20160816; b=Poxgl3Dqy3A9FroYuxycsplWlQZpCqRILdlxbshchs+muxBOJ7rxJQ2fmY9izlzbTw Bq/9/s0Y1HwGcWjEa5eIriY8tIwWb+uv00BcUbb0dRMUcE+TW9p8u0j6BEnbOnhESqtW 3/ukm8rn2GJwcV6cqcWpSxALAQqbPHoGM6PKdtETE/UFqDR1gPDsSPPizfrPxoKEUCAr P7y/PA2ILavMEvPoRiZjuCvHW89qp4RHvK626x0Jj57G8m8/XlWdjX1AgfKqkP83HBv5 pvs9SRXa6yb6ouaHYnF6BRA9u05cj0z2lLpCU1ESE5EIfwBSDBDSTnK35U49a+7winW5 Indw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:message-id:date:to:from :dkim-signature; bh=EHA7X11js0VhAifcHQqk4CYiPRwcHdEmEe7J8ki2xr4=; b=UfSbEcY6Re5ARo+YUQCpk2e0HvwACeIp3lfzijcshl4/bwIj9HITh+QKsTCoS5PgKn ApV686iPErki7QGbDtBQHCS4+10wX7yrg/a+c13l0HHgb6nMPy4hDtMDB8K4MIdHu2Gm foOSXgT+UMaeZxq9TEQokurnRAsFd4c6U/GeW+g18Mp5mVXquXcRPph0/dBPpef/Bo4B IzvegwdGGkP4FbYid0KHmZG5NydQGzLTkC76qZR2R+kWub4HcYoiFczn9zHw5oaRtLZ5 2Z1BggloNrpBU1uup0udK1UpnDb167mGdoUDzr06TP8VEbwv5tWRxIjLC7WtLA+fMQfB Xz4g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kubIzHuJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id c47si8505894qvh.87.2018.11.12.13.58.23 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 12 Nov 2018 13:58:23 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kubIzHuJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50863 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gMKDu-0005qo-QK for patch@linaro.org; Mon, 12 Nov 2018 16:58:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54051) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gMK35-0003U5-3O for qemu-devel@nongnu.org; Mon, 12 Nov 2018 16:47:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gMK31-0004tZ-Qd for qemu-devel@nongnu.org; Mon, 12 Nov 2018 16:47:10 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]:32992) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gMK31-0004t4-Bs for qemu-devel@nongnu.org; Mon, 12 Nov 2018 16:47:07 -0500 Received: by mail-wm1-x32d.google.com with SMTP id f19-v6so9798029wmb.0 for ; Mon, 12 Nov 2018 13:47:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=EHA7X11js0VhAifcHQqk4CYiPRwcHdEmEe7J8ki2xr4=; b=kubIzHuJz3j3Moutai8MNeoabdPFJW1hrJ9cHvZexyd06ZoI6HzBvS9iY2IZjwk5yK fTW1EP19CHyAX4+jcU5ixMISEDt0Q4JOZlNUfZXMxCQ1X3dxwH5xfiIjxDD0mAhvbt5Q 7/1Bcua1qqKUDjFCLbiSWS8gTybR0eACvIeN0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=EHA7X11js0VhAifcHQqk4CYiPRwcHdEmEe7J8ki2xr4=; b=NFcJe7ji88eUR6LEKmxjbUUSGBdMBrTtUDy6iQ7GvR2gEQs0/dRC8/rnmzG9ISpNPj nAVxZOpQOVYqZUqQV+6sSWmipv1tAM7p8J25cSulLLA1yT8V/c/FR8CedI432V3YhAIG 7tS/0fuPf0oeqvUsNYtJSnT5XTnMXNTdwV5pje8kBrnt5pgUbVRr3uQEoSqaXwJXoHFc ZPYQp4NngY+I70KuccYL5coq2P8VzQN3Yekbr7Ll6RDiwmGEnHhylmWnegaeH6XYdla+ yxIy+WGJ3UFZ8ISaV5GhgHFrQifUQkQfr2TTGZ3qp+WgRU8QwQ7O30MYdYbhUx3OtILX qnYw== X-Gm-Message-State: AGRZ1gJfejcM5ofe1hsluQl4bN4NpLED4pqnkbwDuy3IQEGyFlJEyHkJ DM0MRIsfCJKgCr4p9BiMoU0DUhAi0qFOWg== X-Received: by 2002:a1c:c911:: with SMTP id f17-v6mr1113924wmb.41.1542059225893; Mon, 12 Nov 2018 13:47:05 -0800 (PST) Received: from cloudburst.twiddle.net (178.red-213-99-154.dynamicip.rima-tde.net. [213.99.154.178]) by smtp.gmail.com with ESMTPSA id y123-v6sm3946907wme.38.2018.11.12.13.47.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Nov 2018 13:47:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 12 Nov 2018 22:44:46 +0100 Message-Id: <20181112214503.22941-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d Subject: [Qemu-devel] [PATCH for-4.0 00/17] tcg: Move softmmu out-of-line X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Based on an idea forwarded by Emilio, which suggests a 5-6% speed gain is possible. I have not spent too much time measuring this, as the code size gains are significant. I believe that I posted an x86_64-only patch some time ago, but this now includes i386, aarch64 and arm32. In late testing I do some failures on i386, for sparc guest. I'll follow up on that later. The main feature here is sharing code to place these out-of-line thunks. We want them to be within a direct call. Once we've emitted a thunk we remember (at least within a given tcg_region) reusing it until we find that the relocation is out of range. At which point we generate another copy. The second main change is that the entire TCGMemOpIdx is built into each thunk. There simply are not enough free registers for i386 (or arm32 for that matter) to pass in the mmu_idx to the thunk. For x86, this displacement is 2GB, and we've already constrained the whole code_gen_buffer to be in range. For aarch64, this displacement is 128MB; for arm32 it is 16MB. In every case, the range is significant, and for any smp guest may well cover the entire tcg_region. Other than these three targets, I have compile-tested the generic change on ppc64le. I have not even compile-tested mips, s390x, or sparc host. r~ Richard Henderson (17): tcg/i386: Add constraints for r8 and r9 tcg/i386: Return a base register from tcg_out_tlb_load tcg/i386: Change TCG_REG_L[01] to not overlap function arguments tcg/i386: Force qemu_ld/st arguments into fixed registers tcg: Return success from patch_reloc tcg: Add TCG_TARGET_NEED_LDST_OOL_LABELS tcg/i386: Use TCG_TARGET_NEED_LDST_OOL_LABELS tcg/aarch64: Add constraints for x0, x1, x2 tcg/aarch64: Parameterize the temps for tcg_out_tlb_read tcg/aarch64: Parameterize the temp for tcg_out_goto_long tcg/aarch64: Use B not BL for tcg_out_goto_long tcg/aarch64: Use TCG_TARGET_NEED_LDST_OOL_LABELS tcg/arm: Parameterize the temps for tcg_out_tlb_read tcg/arm: Add constraints for R0-R5 tcg/arm: Reduce the number of temps for tcg_out_tlb_read tcg/arm: Force qemu_ld/st arguments into fixed registers tcg/arm: Use TCG_TARGET_NEED_LDST_OOL_LABELS tcg/aarch64/tcg-target.h | 2 +- tcg/arm/tcg-target.h | 2 +- tcg/i386/tcg-target.h | 2 +- tcg/tcg.h | 4 + tcg/aarch64/tcg-target.inc.c | 318 +++++++++--------- tcg/arm/tcg-target.inc.c | 535 +++++++++++++++--------------- tcg/i386/tcg-target.inc.c | 611 ++++++++++++++++++++--------------- tcg/mips/tcg-target.inc.c | 29 +- tcg/ppc/tcg-target.inc.c | 47 +-- tcg/s390/tcg-target.inc.c | 37 ++- tcg/sparc/tcg-target.inc.c | 13 +- tcg/tcg-ldst-ool.inc.c | 94 ++++++ tcg/tcg-pool.inc.c | 5 +- tcg/tcg.c | 28 +- tcg/tci/tcg-target.inc.c | 3 +- 15 files changed, 974 insertions(+), 756 deletions(-) create mode 100644 tcg/tcg-ldst-ool.inc.c -- 2.17.2