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[174.21.9.133]) by smtp.gmail.com with ESMTPSA id p62-v6sm33170892pfp.111.2018.10.18.18.56.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Oct 2018 18:56:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 18 Oct 2018 18:56:14 -0700 Message-Id: <20181019015617.22583-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::635 Subject: [Qemu-devel] [PATCH v2 0/3] target/arm: Reduce tlb_flush overhead X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" While installing AArch64 Ubuntu into a new vm, I happened to notice that tlb_flush+memset was consuming 25% of the total runtime. This patch set reduces that overhead to 10%. Full tlb flushes are down to 11k from 1.8M, when pausing the installation at the first menu. Changes since v1: * Rename the function in patch 3 to vmsa_ttbr_el1_write. r~ Richard Henderson (3): target/arm: Remove writefn from TTBR0_EL3 target/arm: Only flush tlb if ASID changes target/arm: Flush only the TLBs affected by TTBR*_EL1 target/arm/helper.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) -- 2.17.2