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[v2,00/15] target/arm: sve system mode patches

Message ID 20180926192323.12659-1-richard.henderson@linaro.org
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Series target/arm: sve system mode patches | expand

Message

Richard Henderson Sept. 26, 2018, 7:23 p.m. UTC 
For v2, I've dropped a few patches and adjusted for some review on v1.

In particular, the patches that adjust the ID system registers are
dropped, so there's not actually a way to run any SVE code in system
mode with just this.  But there's no point keeping these out of tree
while work continues on the system register issue.

Patches without review: 3, 4, 5, 6, 7.


r~


Richard Henderson (15):
  target/arm: Define ID_AA64ZFR0_EL1
  target/arm: Adjust sve_exception_el
  target/arm: Pass in current_el to fp and sve_exception_el
  target/arm: Handle SVE vector length changes in system mode
  target/arm: Adjust aarch64_cpu_dump_state for system mode SVE
  target/arm: Clear unused predicate bits for LD1RQ
  target/arm: Rewrite helper_sve_ld1*_r using pages
  target/arm: Rewrite helper_sve_ld[234]*_r
  target/arm: Rewrite helper_sve_st[1234]*_r
  target/arm: Split contiguous loads for endianness
  target/arm: Split contiguous stores for endianness
  target/arm: Rewrite vector gather loads
  target/arm: Rewrite vector gather stores
  target/arm: Rewrite vector gather first-fault loads
  target/arm: Pass TCGMemOpIdx to sve memory helpers

 target/arm/cpu.h           |    8 +
 target/arm/helper-sve.h    |  385 +++++--
 target/arm/internals.h     |    5 +
 target/arm/cpu64.c         |   42 -
 target/arm/helper.c        |  237 +++--
 target/arm/op_helper.c     |    1 +
 target/arm/sve_helper.c    | 1961 ++++++++++++++++++++++++------------
 target/arm/translate-a64.c |    8 +-
 target/arm/translate-sve.c |  670 ++++++++----
 9 files changed, 2267 insertions(+), 1050 deletions(-)

-- 
2.17.1