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[0/6] target/arm: More sve-ish fixes

Message ID 20180810193129.1556-1-richard.henderson@linaro.org
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Series target/arm: More sve-ish fixes | expand

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Richard Henderson Aug. 10, 2018, 7:31 p.m. UTC 
All from problems reported by Laurent this week.  Five of them are
SVE related, but while trying to simplify one of the reports I
discovered that I had broken ARMv8.3 just before final commit.


r~


Richard Henderson (6):
  target/arm: Adjust FPCR_MASK for FZ16
  target/arm: Ignore float_flag_input_denormal from fp_status_f16
  target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h
  target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half
  target/arm: Fix aa64 FCADD and FCMLA decode
  softfloat: Fix missing inexact for floating-point add

 target/arm/cpu.h           |  2 +-
 fpu/softfloat.c            |  2 +-
 target/arm/helper.c        | 11 ++++++++++-
 target/arm/sve_helper.c    |  2 +-
 target/arm/translate-a64.c | 12 ++++++------
 target/arm/translate-sve.c |  4 ++--
 6 files changed, 21 insertions(+), 12 deletions(-)

-- 
2.17.1

Comments

Peter Maydell Aug. 16, 2018, 12:50 p.m. UTC | #1 
On 10 August 2018 at 20:31, Richard Henderson
<richard.henderson@linaro.org> wrote:
> All from problems reported by Laurent this week.  Five of them are

> SVE related, but while trying to simplify one of the reports I

> discovered that I had broken ARMv8.3 just before final commit.

>

>

> r~

>

>

> Richard Henderson (6):

>   target/arm: Adjust FPCR_MASK for FZ16

>   target/arm: Ignore float_flag_input_denormal from fp_status_f16

>   target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h

>   target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half

>   target/arm: Fix aa64 FCADD and FCMLA decode

>   softfloat: Fix missing inexact for floating-point add




Applied to target-arm.next, thanks.

-- PMM