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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:38 -0700 Message-Id: <20180502221552.3873-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::231 Subject: [Qemu-devel] [PATCH v2 00/14] target/arm: Fixups for ARM_FEATURE_V8_FP16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" When running the gcc testsuite with current aarch64-linux-user, the testsuite detects the presence of the fp16 extension and enables lots of extra tests for builtins. Quite a few of these new tests fail because we missed implementing some instructions. We really should go back and verify that nothing else is missing from this (rather large) extension. In addition, it tests some edge conditions on data that show flaws in the way we were performing integer<->fp conversion; particularly with respect to scaled conversion. Changes since v1: * Rebased vs master instead of tgt-arm-sve-9. * Alex did some additional digging through the ARM xhtml and came up with some additional missing instructions. * Everything cc'd to qemu-stable. r~ Alex Bennée (4): target/arm: Implement FCMP for fp16 target/arm: Implement FCSEL for fp16 target/arm: Implement FMOV (immediate) for fp16 target/arm: Fix sqrt_f16 exception raising Richard Henderson (10): target/arm: Implement vector shifted SCVF/UCVF for fp16 target/arm: Implement vector shifted FCVT for fp16 target/arm: Fix float16 to/from int16 target/arm: Clear SVE high bits for FMOV target/arm: Implement FMOV (general) for fp16 target/arm: Implement FCVT (scalar,integer) for fp16 target/arm: Implement FCVT (scalar,fixed-point) for fp16 target/arm: Introduce and use read_fp_hreg target/arm: Implement FP data-processing (2 source) for fp16 target/arm: Implement FP data-processing (3 source) for fp16 target/arm/helper-a64.h | 2 + target/arm/helper.h | 6 + target/arm/helper-a64.c | 10 + target/arm/helper.c | 87 +++++++- target/arm/translate-a64.c | 535 ++++++++++++++++++++++++++++++++++++--------- 5 files changed, 532 insertions(+), 108 deletions(-) -- 2.14.3