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[97.126.103.167]) by smtp.gmail.com with ESMTPSA id b22sm20382140pfh.175.2017.09.12.09.25.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Sep 2017 09:25:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 12 Sep 2017 09:24:57 -0700 Message-Id: <20170912162513.21694-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::231 Subject: [Qemu-devel] [PATCH v2 00/16] TCG vectorization and example conversion X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" I haven't gotten so far as the complex vector op issue that came up in conversation with Alex this week. But this is what I was targeting as v2: * Add documentation. Enough, or is it still lacking? * Fixed the bug in tcg/i386 that affected BIC. * Fill in the host vector ops for aarch64. r~ Richard Henderson (16): tcg: Add expanders for out-of-line vector helpers tcg: Add types for host vectors tcg: Add operations for host vectors tcg: Add tcg_op_supported tcg: Add INDEX_op_invalid tcg: Add vector infrastructure and ops for add/sub/logic target/arm: Align vector registers target/arm: Use vector infrastructure for aa64 add/sub/logic tcg/i386: Add vector operations tcg/aarch64: Fully convert tcg_target_op_def tcg: Remove tcg_regset_clear tcg: Remove tcg_regset_set tcg: Remove tcg_regset_{or,and,andnot,not} tcg: Remove tcg_regset_set32 tcg: Fix types in tcg_regset_{set,reset}_reg tcg/aarch64: Add vector operations Makefile.target | 5 +- target/arm/cpu.h | 2 +- tcg/aarch64/tcg-target.h | 23 +- tcg/i386/tcg-target.h | 46 ++- tcg/tcg-gvec-desc.h | 49 +++ tcg/tcg-op-gvec.h | 104 +++++++ tcg/tcg-opc.h | 91 ++++++ tcg/tcg-runtime.h | 16 + tcg/tcg.h | 46 ++- target/arm/translate-a64.c | 137 +++++---- tcg/aarch64/tcg-target.inc.c | 689 +++++++++++++++++++++++++++++++------------ tcg/arm/tcg-target.inc.c | 25 +- tcg/i386/tcg-target.inc.c | 468 +++++++++++++++++++++++++---- tcg/mips/tcg-target.inc.c | 2 +- tcg/ppc/tcg-target.inc.c | 41 +-- tcg/s390/tcg-target.inc.c | 22 +- tcg/sparc/tcg-target.inc.c | 52 ++-- tcg/tcg-op-gvec.c | 582 ++++++++++++++++++++++++++++++++++++ tcg/tcg-runtime-gvec.c | 192 ++++++++++++ tcg/tcg.c | 334 ++++++++++++++++++++- tcg/tci/tcg-target.inc.c | 13 +- 21 files changed, 2527 insertions(+), 412 deletions(-) create mode 100644 tcg/tcg-gvec-desc.h create mode 100644 tcg/tcg-op-gvec.h create mode 100644 tcg/tcg-op-gvec.c create mode 100644 tcg/tcg-runtime-gvec.c -- 2.13.5