From patchwork Mon Feb 6 15:30:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 93440 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp1824308obz; Mon, 6 Feb 2017 07:33:57 -0800 (PST) X-Received: by 10.200.56.187 with SMTP id f56mr9264007qtc.234.1486395237835; Mon, 06 Feb 2017 07:33:57 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id r62si722970qkd.168.2017.02.06.07.33.57 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 06 Feb 2017 07:33:57 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49026 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1calIj-00073p-9e for patch@linaro.org; Mon, 06 Feb 2017 10:33:57 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37180) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1calG2-0005iq-8r for qemu-devel@nongnu.org; Mon, 06 Feb 2017 10:31:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1calFz-0008RT-3W for qemu-devel@nongnu.org; Mon, 06 Feb 2017 10:31:10 -0500 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:34844) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1calFy-0008R5-S3 for qemu-devel@nongnu.org; Mon, 06 Feb 2017 10:31:07 -0500 Received: by mail-wm0-x22e.google.com with SMTP id b65so125306888wmf.0 for ; Mon, 06 Feb 2017 07:31:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=NHze5yhCEY6WzlAe3enY9AM33sYUv8n+tHKHH8mrMsU=; b=TkpR+3yQ7JJgQfYnyyzsU4UD4vaTjJqrI3YnvP22Psrpxuln7Ag52s8zObNFzW6UmQ yqNp6f1Lnmk9HvGSfeJICN0g+kWRJ8P839nJDFuxiTUA6n64fAH61+8jQt0vqiTfmbw5 YvSWgjhHttnsk3ypigzEjIWfpNGw1Tmq7W8nM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=NHze5yhCEY6WzlAe3enY9AM33sYUv8n+tHKHH8mrMsU=; b=kg8EmBWyB5CPLMlEPK5+Pge3Y93c3Ig/FLJigafn9AwathkE55+xOsTvGzpmtf2rxm f4DmeRAVKAAmwuesT5ks6LIDj05zgng0koeEZipIqK1tRzuKYjeHxI1wf1XVlVUfNta8 pXSOfb9y4u+3g0PrAImW1xV8pkii8sA2EFlLBuxBMQSUYbkxj4kqb329YZNK7jjSe/wj yDrqaSb3UFbCOZVMg6/XNMU3TuSMRbq/is+PSrcxiG7zokT9gKh6nUyqA4/vVgxbXKV0 E6RpWeyqgaKQQTiomEEnfZqdTLlUdr6/D5GSr7CSu8M8jzUCgm4xzsDl7G7LK2anq2BZ UU7Q== X-Gm-Message-State: AMke39mAaVQyWbRS4lzv582dSs2Egk51xI2lk1x1c5wKKL19ZhJuvGI7w/JJgWc0H/alcZaY X-Received: by 10.28.198.65 with SMTP id w62mr9424784wmf.123.1486395065147; Mon, 06 Feb 2017 07:31:05 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id c202sm13461801wmd.10.2017.02.06.07.31.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Feb 2017 07:31:04 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 892543E0550; Mon, 6 Feb 2017 15:31:13 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net Date: Mon, 6 Feb 2017 15:30:50 +0000 Message-Id: <20170206153113.27729-1-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22e Subject: [Qemu-devel] [PATCH v10 00/23] MTTCG Base enabling patches with ARM enablement X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, jan.kiszka@siemens.com, mark.burton@greensocs.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, serge.fdrv@gmail.com, pbonzini@redhat.com, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , bamvor.zhangjian@linaro.org, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Hi Richard/Peter, This is a mostly ARM focused update to last weeks v9. It has necessitated one change to the cputlb API. It was pointed out that translators often have to special case a bunch of things if you longjmp() out of a helper. As a result the cputlb _synched() calls are no longer QEMU_NORETURN but do document the importance of the guest to exit the block as soon as synchronisation is required. In ARM's case this is already done as the TLB flushes are treated as CP write operation which ends the block by default. This means I was able to drop the two patches that dealt with ARM_CP_PC, simplifying the code. The other moderate change was fixing up target-arm/powerctl to properly model the ON_PENDING powerstate which is key to vCPUs handling otherwise race-prone start-up sequences. The power off and reset methods where also updated to update the CPUState structures in the targets context. Otherwise there is the usual array of review tags and a few minor fixes documented as normal bellow the --- line. A version of the tree can be found at: https://github.com/stsquad/qemu/tree/mttcg/base-patches-v10 Cheers, Alex Alex Bennée (17): docs: new design document multi-thread-tcg.txt tcg: move TCG_MO/BAR types into own file tcg: add kick timer for single-threaded vCPU emulation tcg: rename tcg_current_cpu to tcg_current_rr_cpu tcg: remove global exit_request tcg: enable tb_lock() for SoftMMU tcg: enable thread-per-vCPU cputlb: add assert_cpu_is_self checks cputlb: tweak qemu_ram_addr_from_host_nofail reporting cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap cputlb: add tlb_flush_by_mmuidx async routines cputlb: atomically update tlb fields used by tlb_reset_dirty cputlb: introduce tlb_flush_*_all_cpus[_synced] target-arm/powerctl: defer cpu reset work to CPU context target-arm: don't generate WFE/YIELD calls for MTTCG target-arm: ensure all cross vCPUs TLB flushes complete tcg: enable MTTCG by default for ARM on x86 hosts Jan Kiszka (1): tcg: drop global lock during TCG code execution KONRAD Frederic (2): tcg: add options for enabling MTTCG cputlb: introduce tlb_flush_* async work. Pranith Kumar (3): mttcg: translate-all: Enable locking debug in a debug build mttcg: Add missing tb_lock/unlock() in cpu_exec_step() tcg: handle EXCP_ATOMIC exception for system emulation configure | 6 + cpu-exec-common.c | 3 - cpu-exec.c | 41 ++-- cpus.c | 343 ++++++++++++++++++++++++++------- cputlb.c | 463 +++++++++++++++++++++++++++++++++++++-------- docs/multi-thread-tcg.txt | 350 ++++++++++++++++++++++++++++++++++ exec.c | 12 +- hw/core/irq.c | 1 + hw/i386/kvmvapic.c | 4 +- hw/intc/arm_gicv3_cpuif.c | 3 + hw/ppc/ppc.c | 16 +- hw/ppc/spapr.c | 3 + include/exec/cputlb.h | 2 - include/exec/exec-all.h | 132 +++++++++++-- include/qom/cpu.h | 16 ++ include/sysemu/cpus.h | 2 + memory.c | 2 + qemu-options.hx | 20 ++ qom/cpu.c | 10 + target/arm/arm-powerctl.c | 192 ++++++++++++------- target/arm/arm-powerctl.h | 2 + target/arm/cpu.h | 13 +- target/arm/helper.c | 219 ++++++++++----------- target/arm/op_helper.c | 50 ++++- target/arm/translate-a64.c | 8 +- target/arm/translate.c | 20 +- target/i386/smm_helper.c | 7 + target/s390x/misc_helper.c | 5 +- target/sparc/ldst_helper.c | 8 +- tcg/i386/tcg-target.h | 11 ++ tcg/tcg-mo.h | 48 +++++ tcg/tcg.h | 27 +-- translate-all.c | 66 ++----- translate-common.c | 21 +- vl.c | 49 ++++- 35 files changed, 1730 insertions(+), 445 deletions(-) create mode 100644 docs/multi-thread-tcg.txt create mode 100644 tcg/tcg-mo.h -- 2.11.0