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[RFC,00/14] ARM Secure EL2 extension

Message ID 1762176.tdWV9SEqCh@basile.remlab.net
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Series ARM Secure EL2 extension | expand

Message

Rémi Denis-Courmont Nov. 2, 2020, 11:07 a.m. UTC 
Hi,

This patchset attempts to add ARMv8 soft-MMU target support for the
ARMv8.4-SEL2 (Secure EL2) extension.

Patches 1-4 are just some initial clean-up / revectoring.
Patches 5-9 add support for running EL2 in secure state.
Patches 10-13 add the secure state stage 2 translation.
Finally patch 14 enables SEL2 for the fake max CPU.

It is preferable, but not necessary, to apply the 3 bug fixes I sent
last week first.

Comments welcome.

----------------------------------------------------------------
Rémi Denis-Courmont (14):
      target/arm: add arm_is_el2_enabled() helper
      target/arm: use arm_is_el2_enabled() where applicable
      target/arm: use arm_hcr_el2_eff() where applicable
      target/arm: factor MDCR_EL2 common handling
      target/arm: declare new AA64PFR0 bit-fields
      target/arm: add 64-bit S-EL2 to EL exception table
      target/arm: return the stage 2 index for stage 1
      target/arm: add MMU stage 1 for Secure EL2
      target/arm: add ARMv8.4-SEL2 system registers
      target/arm: do S1_ptw_translate() before address space lookup
      target/arm: secure stage 2 translation regime
      target/arm: set HPFAR_EL2.NS on secure stage 2 faults
      target/arm: add ARMv8.4-SEL2 extension
      target/arm: enable Secure EL2 in max CPU

 target/arm/cpu-param.h     |   2 +-
 target/arm/cpu.c           |   2 +-
 target/arm/cpu.h           |  75 ++++++++-
 target/arm/cpu64.c         |   1 +
 target/arm/helper-a64.c    |   8 +-
 target/arm/helper.c        | 408 ++++++++++++++++++++++++++++++---------------
 target/arm/internals.h     |  53 +++++-
 target/arm/op_helper.c     |   4 +-
 target/arm/tlb_helper.c    |   3 +
 target/arm/translate-a64.c |   4 +
 target/arm/translate.c     |   6 +-
 target/arm/translate.h     |   1 +
 12 files changed, 407 insertions(+), 160 deletions(-)