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[46.33.159.2]) by mx.google.com with ESMTPSA id v6sm6823630wiy.11.2013.05.07.19.35.10 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 07 May 2013 19:35:10 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: Stefano.Stabellini@eu.citrix.com, patches@linaro.org, ian.campbell@citrix.com, Julien Grall Subject: [PATCH V2 31/33] xen/arm: Add platform specific code for the exynos5 Date: Wed, 8 May 2013 03:33:51 +0100 Message-Id: X-Mailer: git-send-email 1.7.10.4 In-Reply-To: References: X-Gm-Message-State: ALoCoQn/okM0B27I+CipNrkxUcqYUvTU/FuCRLPRi5t3GmjOXHoYNKJw7WlkN+HuQJ2JTL8WH3EU X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::22b is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Julien Grall Changes in v2: - Add dom0 1:1 mapping quirk for the arndale board - s/mapping/mappings/ in comment - Remove debug trap (unnecessary with linux 3.9) --- xen/arch/arm/platforms/Makefile | 1 + xen/arch/arm/platforms/exynos5.c | 86 +++++++++++++++++++++++++++++++ xen/include/asm-arm/platforms/exynos5.h | 40 ++++++++++++++ 3 files changed, 127 insertions(+) create mode 100644 xen/arch/arm/platforms/exynos5.c create mode 100644 xen/include/asm-arm/platforms/exynos5.h diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile index 4313e95..ff2b65b 100644 --- a/xen/arch/arm/platforms/Makefile +++ b/xen/arch/arm/platforms/Makefile @@ -1 +1,2 @@ obj-y += vexpress.o +obj-y += exynos5.o diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c new file mode 100644 index 0000000..8620390 --- /dev/null +++ b/xen/arch/arm/platforms/exynos5.c @@ -0,0 +1,86 @@ +/* + * xen/arch/arm/platforms/exynos5.c + * + * Exynos5 specific settings + * + * Julien Grall + * Copyright (c) 2013 Linaro Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +static int exynos5_init_time(void) +{ + uint32_t reg; + + // enable timer on exynos5 arndale board + // should probably be done by u-boot + reg = platform_read_register(EXYNOS5_MCT_G_TCON); + platform_write_register(EXYNOS5_MCT_G_TCON, reg | EXYNOS5_MCT_G_TCON_START); + + return 0; +} + +/* Additionnal mappings for dom0 (Not in the DTS) */ +static int exynos5_specific_mapping(struct domain *d) +{ + /* Map the chip ID */ + map_mmio_regions(d, EXYNOS5_PA_CHIPID, EXYNOS5_PA_CHIPID + PAGE_SIZE - 1, + EXYNOS5_PA_CHIPID); + + /* Map the PWM region */ + map_mmio_regions(d, EXYNOS5_PA_TIMER, + EXYNOS5_PA_TIMER + (PAGE_SIZE * 2) - 1, + EXYNOS5_PA_TIMER); + + return 0; +} + +static void exynos5_reset(void) +{ + platform_write_register(EXYNOS5_SWRESET, 1); +} + +static uint32_t exynos5_quirks(void) +{ + return PLATFORM_QUIRK_DOM0_MAPPING_11; +} + +static const char const *exynos5_dt_compat[] __initdata = +{ + "samsung,exynos5250", + NULL +}; + +PLATFORM_START(exynos5, "SAMSUNG EXYNOS5") + .compatible = exynos5_dt_compat, + .init_time = exynos5_init_time, + .specific_mapping = exynos5_specific_mapping, + .reset = exynos5_reset, + .quirks = exynos5_quirks, +PLATFORM_END + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/platforms/exynos5.h b/xen/include/asm-arm/platforms/exynos5.h new file mode 100644 index 0000000..d77623c --- /dev/null +++ b/xen/include/asm-arm/platforms/exynos5.h @@ -0,0 +1,40 @@ +#ifndef __ASM_ARM_PLATFORMS_EXYNOS5_H +#define __ASM_ASM_PLATFORMS_EXYSNO5_H + +#define EXYNOS5_MCT_BASE 0x101c0000 +#define EXYNOS5_MCTREG(x) (EXYNOS5_MCT_BASE + (x)) +#define EXYNOS5_MCT_G_TCON EXYNOS5_MCTREG(0x240) +#define EXYNOS5_MCT_G_TCON_START (1 << 8) + +#define EXYNOS5_PA_CHIPID 0x10000000 +#define EXYNOS5_PA_TIMER 0x12dd0000 +/* Base address of system controller */ +#define EXYNOS5_PA_PMU 0x10040000 + +#define EXYNOS5_SWRESET (EXYNOS5_PA_PMU + 0x0400) + +#define S5P_PA_SYSRAM 0x02020000 + +/* Constants below is only used in assembly because the DTS is not yet parsed */ +#ifdef __ASSEMBLY__ + +/* GIC Base Address */ +#define EXYNOS5_GIC_BASE_ADDRESS 0x10480000 + +/* Timer's frequency */ +#define EXYNOS5_TIMER_FREQUENCY (24 * 1000 * 1000) /* 24 MHz */ + +/* Arndale machine ID */ +#define MACH_TYPE_SMDK5250 3774 + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_ARM_PLATFORMS_EXYNOS5_H */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */